Patents by Inventor Chun-Yi Lee
Chun-Yi Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11948722Abstract: A planar winding transformer includes a magnetic core set and a multilayer circuit board. The magnetic core set includes two magnetic cores and two magnetic columns. The two magnetic cores are parallel to each other. The multilayer circuit board is disposed between two magnetic cores, and two magnetic columns penetrate through the multilayer circuit board. The multilayer circuit board includes two low voltage winding layers and one high voltage winding layer. Two low voltage winding layers are connected to each other in parallel, and the high voltage winding layer is disposed between two low voltage winding layers. When the high voltage winding layer receives a polarity current, at least one of the low voltage winding layers generates a corresponding induced current. Two magnetic cores and two magnetic columns form a closed path for magnetic flux.Type: GrantFiled: January 8, 2021Date of Patent: April 2, 2024Assignees: CHICONY POWER TECHNOLOGY CO., LTD., NATIONAL TAIPEI UNIVERSITY OF TECHNOLOGYInventors: Yen-Shin Lai, Yong-Yi Huang, Chun-Hung Lee, Hao-Chieh Chang
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Patent number: 11944412Abstract: A blood pressure detection device manufactured by a semiconductor process includes a substrate, a microelectromechanical element, a gas-pressure-sensing element, a driving-chip element, an encapsulation layer and a valve layer. The substrate includes inlet apertures. The microelectromechanical element and the gas-pressure-sensing element are stacked and integrally formed on the substrate. The encapsulation layer is encapsulated and positioned on the substrate. A flowing-channel space is formed above the microelectromechanical element and the gas-pressure-sensing element. The encapsulation layer includes an outlet aperture in communication with an airbag. The driving-chip element controls the microelectromechanical element, the gas-pressure-sensing element and valve units to transport gas.Type: GrantFiled: June 2, 2021Date of Patent: April 2, 2024Assignee: MICROJET TECHNOLOGY CO., LTD.Inventors: Hao-Jan Mou, Ying-Lun Chang, Ching-Sung Lin, Chi-Feng Huang, Yung-Lung Han, Chang-Yen Tsai, Wei-Ming Lee, Chun-Yi Kuo, Tsung-I Lin
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Patent number: 11937903Abstract: A blood pressure device includes a first blood pressure measuring device, a second blood pressure measuring device, and a controller. The first blood pressure measuring device is to be worn on a first position of a wrist so as to obtain a first blood pressure information of the first position. The second blood pressure measuring device is to be worn on a second position of the wrist so as to obtain a second blood pressure information of the second position. The controller is electrically coupled to the first blood pressure measuring device and the second blood pressure measuring device so as to adjust tightness between the expanders and the user's skin, respectively. The controller receives, processes, and calculates a pulse transit time between the first blood pressure information and the second blood pressure information, and the controller obtains at least one blood pressure value based on the pulse transit time.Type: GrantFiled: December 29, 2020Date of Patent: March 26, 2024Assignee: MICROJET TECHNOLOGY CO., LTD.Inventors: Hao-Jan Mou, Yung-Lung Han, Chi-Feng Huang, Chang-Yen Tsai, Wei-Ming Lee, Chun-Yi Kuo, Chin-Wen Hsieh
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Patent number: 11942376Abstract: Methods of manufacturing a semiconductor structure are provided. One of the methods includes: receiving a substrate including a first conductive region of a first transistor and a second conductive region of a second transistor, wherein the first transistor and the second transistor have different conductive types; performing an amorphization on the first conductive region and the second conductive region; performing an implantation over the first conductive region of the first transistor; forming a contact material layer over the first conductive region and the second conductive region; performing a thermal anneal on the first conductive region and the second conductive region; and performing a laser anneal on the first conductive region and the second conductive region.Type: GrantFiled: August 8, 2022Date of Patent: March 26, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Chun Hsiung Tsai, Cheng-Yi Peng, Ching-Hua Lee, Chung-Cheng Wu, Clement Hsingjen Wann
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Patent number: 11935890Abstract: In a method for forming an integrated semiconductor device, a first inter-layer dielectric (ILD) layer is formed over a semiconductor device that includes a first transistor structure, a two-dimensional (2D) material layer is formed over and in contact with the first ILD layer, the 2D material layer is patterned to form a channel layer of a second transistor structure, a source electrode and a drain electrode of the second transistor structure are formed over the patterned 2D material layer and laterally spaced apart from each other, a gate dielectric layer of the second transistor structure is formed over the patterned 2D material layer, the source electrode and the drain electrode, and a gate electrode of the second transistor structure is formed over the gate dielectric layer and laterally between the source electrode and the drain electrode.Type: GrantFiled: April 11, 2022Date of Patent: March 19, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Cheng-Yi Peng, Chun-Chieh Lu, Meng-Hsuan Hsiao, Ling-Yen Yeh, Carlos H. Diaz, Tung-Ying Lee
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Publication number: 20240070809Abstract: A method can include receiving a low-resolution (LR) image, extracting a first feature embedding from the LR image, performing a first upsampling to the LR image by a first upsampling factor to generate a upsampled image, receiving a LR coordinate of a pixel within the LR image and a first cell size of the LR coordinate, generating a first residual image based on the first feature embedding, the LR coordinate, and the first cell size of the LR coordinate using a local implicit image function, and generating a first high-resolution (HR) image by combining the first residual image and the upsampled image via element-wise addition.Type: ApplicationFiled: April 12, 2023Publication date: February 29, 2024Applicants: MEDIATEK INC., National Tsing Hua UniversityInventors: Yu-Syuan XU, Hao-Wei CHEN, Chun-Yi LEE
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Publication number: 20230362196Abstract: The present invention includes the following steps: loading a master policy, a plurality of sub-policies, and environment data; wherein the sub-policies have different inference costs; selecting one of the sub-policies as a selected sub-policy by using the master policy; generating at least one action signal according to the selected sub-policy; applying the at least one action signal to an action executing unit; detecting at least one reward signal from a detecting module; training the master policy using at least one real inference cost of the at least one reward signal and an expected inference cost of the selected sub-policy to minimize inference cost; the present invention trains the master policy using Hierarchical Reinforcement Learning with an asymmetrical policy architecture, thus allowing the master policy to reduce inference cost while maintaining satisfying performance for a deep neural network model.Type: ApplicationFiled: May 4, 2022Publication date: November 9, 2023Inventor: Chun-Yi LEE
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Publication number: 20230282134Abstract: A medicament delivery device design evaluation apparatus is presented having a plurality of electronic demonstration units, wherein each electronic demonstration unit comprises a set of electronics, the set of electronics comprising a data receiver and at least one of an indication unit and a data transmitter; wherein the plurality of electronic demonstration units are configured to provide an indication when at least one of the plurality of electronic demonstration units receives a control signal.Type: ApplicationFiled: July 6, 2021Publication date: September 7, 2023Inventors: Shih-Hsun Tu, Hsueh-Yi Chen, Pei-Chi Hu, Chun-Yi Lee
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Publication number: 20230197524Abstract: An etch stop layer is formed over a semiconductor fin and gate stack. The etch stop layer is formed utilizing a series of pulses of precursor materials. A first pulse introduces a first precursor material to the semiconductor fin and gate stack. A second pulse introduces a second precursor material, which is turned into a plasma and then directed towards the semiconductor fin and gate stack in an anisotropic deposition process. As such, a thickness of the etch stop layer along a bottom surface is larger than a thickness of the etch stop layer along sidewalls.Type: ApplicationFiled: February 13, 2023Publication date: June 22, 2023Inventors: Chun-Yi Lee, Hong-Hsien Ke, Chung-Ting Ko, Chia-Hui Lin, Jr-Hung Li
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Publication number: 20230184541Abstract: A calibration method of three-dimensional measurement system includes a projection device, a camera and a processor. The projection device projects structural light to a reference object including a first calibration surface and a second calibration surface. The camera photographs the reference object to obtain at least one reference object image. The processor performs decoding according to the at least one reference object image to obtain a plurality of pieces of phase data of the at least one reference object image. The processor computes a first phase corresponding to the first calibration surface and a second phase corresponding to the second calibration surface according to the phase data, calculates a surface phase difference between the first phase and the second phase, and computes according to the surface phase difference and a height of the second calibration surface relative to the first calibration surface to obtain a phase-height conversion parameter.Type: ApplicationFiled: May 13, 2022Publication date: June 15, 2023Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Jhe-Ruei LI, Wei-Shiang HUANG, Tsai-Ling KAO, Chun-Yi LEE
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Publication number: 20230096391Abstract: A medicament delivery device is presented having a front-end device with a front-end housing and a delivery member cover that moves along a longitudinal axis between an extended position and a retracted position relative to the front-end housing, and a medicament container holder arranged in the front-end housing that receives a medicament container; and a reusable base device that is detachably connected to the front-end device, the base device has a plunger, a motor to drive the plunger inside the front-end housing, and wherein the motor drives the plunger from a second end position back to an initial end position, and a motor switch having a first switch position that changes to a default switch position by displacement of the delivery member cover when the delivery member cover is moved back from a retracted position to an extended position causing the motor to rotate in a reverse direction and drive the plunger from the second end position to the initial end position.Type: ApplicationFiled: November 27, 2020Publication date: March 30, 2023Inventors: Hsueh-Yi Chen, Pei Chi Hu, Chun-Yi Lee
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Patent number: 11600530Abstract: An etch stop layer is formed over a semiconductor fin and gate stack. The etch stop layer is formed utilizing a series of pulses of precursor materials. A first pulse introduces a first precursor material to the semiconductor fin and gate stack. A second pulse introduces a second precursor material, which is turned into a plasma and then directed towards the semiconductor fin and gate stack in an anisotropic deposition process. As such, a thickness of the etch stop layer along a bottom surface is larger than a thickness of the etch stop layer along sidewalls.Type: GrantFiled: December 7, 2018Date of Patent: March 7, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chun-Yi Lee, Hong-Hsien Ke, Chung-Ting Ko, Chia-Hui Lin, Jr-Hung Li
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Patent number: 11509873Abstract: A light source generating device, a projection apparatus and a light source generation method are provided. The light source generating device includes a first light source, an auxiliary light source, a control device, a driver and a current command generator. The first light source generates a first light beam. The auxiliary light source generates an auxiliary light beam corresponding to the first light beam. The control device generates a first driving signal to drive the first light source. The driver generates an auxiliary driving signal to drive the auxiliary light source according to the gate control signal and a current command. The current command generator receives an indication signal, and generates the current command according to the indication signal, wherein the indication signal corresponds to a driving current of the first light source. The invention has an effect of enhancing brightness/chrominance.Type: GrantFiled: January 10, 2019Date of Patent: November 22, 2022Assignee: Coretronic CorporationInventors: Chi-Wen Ke, Hung-Wei Lin, Chun-Yi Lee
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Publication number: 20220364236Abstract: In an embodiment, an apparatus includes: a susceptor including substrate pockets; a gas injector disposed over the susceptor, the gas injector having first process regions, the gas injector including a first gas mixing hub and first distribution valves connecting the first gas mixing hub to the first process regions; and a controller connected to the gas injector and the susceptor, the controller being configured to: connect a first precursor material and a carrier gas to the first gas mixing hub; mix the first precursor material and the carrier gas in the first gas mixing hub to produce a first precursor gas; rotate the susceptor to rotate a first substrate disposed in one of the substrate pockets; and while rotating the susceptor, control the first distribution valves to sequentially introduce the first precursor gas at each of the first process regions as the first substrate enters each first process region.Type: ApplicationFiled: July 14, 2022Publication date: November 17, 2022Inventors: Yung-Chang Chang, Meng-Yin Tsai, Tung-Hsiung Liu, Liang-Yu Yeh, Chun-Yi Lee, Kuo-Hsi Huang
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Publication number: 20220288325Abstract: A cap assembly adapted to removably attach to a medicament delivery device is presented having a longitudinally extending cap body configured to be removably attached to a proximal end of the medicament delivery device; an electronic component associated with the cap body; a power source associated with the cap body and configured for powering the electronic component; a resilient member associated with the cap body and configured to establish an electrical connection between the power source and the electronic component, wherein the cap body can have a movable member configured to interact with the resilient member and with a component of the medicament delivery device such that when the cap body is attached to the medicament delivery device, the resilient member is prevented to establish the electrical connection between the power source and the electronic component.Type: ApplicationFiled: September 7, 2020Publication date: September 15, 2022Inventors: Jyun-An Yao, Hsueh-Yi Chen, Jung-Chien Chou, Chun-Yi Lee, Hsun Shih Tu
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Publication number: 20220068812Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a first contact and a second contact disposed over a substrate. A center of a first upper surface of the first contact is laterally separated from a center of a second upper surface of the second contact by a first distance. A first interconnect contacts the first upper surface and a second interconnect contacts the second upper surface. A center of a first lower surface of the first interconnect is laterally separated from a center of a second lower surface of the second interconnect by a second distance that is greater than the first distance.Type: ApplicationFiled: October 14, 2021Publication date: March 3, 2022Inventors: Liang-Yao Lee, Tsung-Chieh Tsai, Juing-Yi Wu, Chun-Yi Lee
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Patent number: 11265681Abstract: An electronic device is capable of determining a radio communications configuration. The electronic device includes a GPS module arranged for receiving an updated GPS coordinate. A controller is electronically coupled to the GPS module, and arranged for controlling the GPS module to receive the updated GPS coordinate and for determining the radio communications configuration based on the updated GPS coordinate received from the GPS module. A transmitter is electronically coupled to the controller and arranged for transmitting a message from the controller according to the determined radio communications configuration.Type: GrantFiled: December 24, 2020Date of Patent: March 1, 2022Assignee: ELITE SEMICONDUCTOR MICROELECTRONICS TECHNOLOGY INC.Inventors: Chun-Yi Lee, Hung-Ta Tso, Chun-Chieh Huang
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Patent number: 11152262Abstract: A method includes etching a gate structure to form a trench extending into the gate structure, wherein sidewalls of the trench comprise a metal oxide material, applying a sidewall treatment process to the sidewalls of the trench, wherein the metal oxide material has been removed as a result of applying the sidewall treatment process and filling the trench with a first dielectric material to form a dielectric region, wherein the dielectric region is in contact with the sidewall of the gate structure.Type: GrantFiled: November 12, 2019Date of Patent: October 19, 2021Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chun-Yi Lee, Ting-Gang Chen, Chieh-Ping Wang, Hong-Hsien Ke, Chia-Hui Lin, Tai-Chun Huang
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Patent number: 11152303Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip has a plurality of gate structures disposed over a substrate. A plurality of metal structures continuously extend from lower surfaces contacting the plurality of gate structures to upper surfaces contacting one or more interconnects within an overlying conductive interconnect layer. The plurality of metal structures are arranged at a first pitch that is larger than a second pitch of the plurality of gate structures.Type: GrantFiled: June 5, 2019Date of Patent: October 19, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Liang-Yao Lee, Tsung-Chieh Tsai, Juing-Yi Wu, Chun-Yi Lee
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Patent number: 11120545Abstract: A method for measuring a hole provided in a workpiece is provided and the method comprises: obtaining a three-dimensional point cloud model of the workpiece and a two-dimensional image of the workpiece, defining a first contour in the three-dimensional point cloud model based on an intensity difference of the two-dimensional image, defining a second contour and a third contour respectively based in the first contour, bounding a data point testing region between the second contour and the third contour, respectively defining data point sampling regions along a plurality of cross-section directions of the data point testing region, respectively sampling data points in the data point sampling regions to obtain a turning point set comprising turning points, wherein each of the turning points has the largest turning margin, connecting the turning points which are distributed in the turning point set along a ring direction to obtain an edge of the hole.Type: GrantFiled: April 1, 2020Date of Patent: September 14, 2021Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chun-Yi Lee, Tsai-Ling Kao, Hian-Kun Tenn