Abstract: Methods, systems, and devices for row hammer mitigation for stacked memory architectures are described. A semiconductor system, such as a memory system, may distribute operations for row hammer mitigation across circuitry of the semiconductor system. A first interface block of a first die of the semiconductor system may exchange signaling with a second interface block of a second die of the semiconductor system to perform row hammer mitigation operations. The second die may implement counters to track quantities of access operations associated with respective rows of memory cells of the second die. The second interface block may transmit alert signaling to the first interface block based on a value of a counter, and the first interface block may evaluate the alert signaling and transmit refresh signaling to the second interface block to perform one or more refresh operations.

Abstract: Methods, systems, and devices for row hammer mitigation reliability in stacked memory architectures are described. A spare counter may be implemented at a first interface block of a logic die to enable increased reliability and efficiency in row hammer mitigation. The first interface block may use a spare counter in case of an error associated with a counter at a memory array die. A second interface block of an array die may identify an error associated with a counter of a memory array and may transmit an indication of the error to the first interface block. The first interface block may receive the indication and may activate a spare counter to track access operations on (e.g., activations of) the row based on the indication. The first interface block may use the spare counter to evaluate whether to transmit refresh signaling to the second interface block for row hammer mitigation.

Abstract: Methods, systems, and devices for management command techniques for stacked memory architectures are described. For example, a system may be configured to support management command signaling between a controller (e.g., of a host system) and interface circuitry (e.g., of a memory system) of a first semiconductor die that is configured for accessing one or more memory arrays (e.g., of the memory system) of one or more second semiconductor dies. The interface circuitry may be configured to schedule or otherwise determine that a management operation is to be performed, and may indicate a request to the controller to schedule aspects of the management operation. In response, the controller may indicate one or more commands to the interface circuitry to perform the management operation.

Abstract: Methods, systems, and devices for interface techniques for stacked memory architectures are described. A semiconductor system, such as a memory system, may distribute memory access circuitry among multiple semiconductor dies of a stack. A first die of the system may include logic circuitry operable to configure a set of multiple first interface blocks of the first die. Each first interface block may include circuitry operable to communicate with one or more second interface blocks of one or more second dies of the system to access a respective set of one or more memory arrays of the one or more second dies. In some examples, the system may include a respective controller for each first interface block to support access operations via the first interface block. The system may also include non-volatile storage, one or more sensors, or a combination thereof to support various operations of the system.

Abstract: Methods, systems, and devices for schedule memory are described. Specifically, techniques are described for a memory interface between a host system and memory (e.g., a tightly coupled memory). For example, a memory interface block (MIB) between the host system and the memory system may schedule access operations performed by the memory system, schedule and perform error control operations, schedule and perform media management operations, as well as schedule and perform other operations. The use of such a MIB may enable the improvement of the memory system by reducing latency and increasing efficiency of memory accesses, while reducing impacts on the architecture and design of the host system.

Abstract: An electronic device and a method for editing personal information are provided. The electronic device includes a display and a processor. The display is configured to display a personal information display area, a first item template and a second item template, and the personal information display area and the first item template are separated by a boundary. The processor is configured to: receive the personal information including a first content, wherein the first item template and the second item template do not present the first content of the personal information; receive a first input operation to move the first item template to the personal information display area to generate a first information item corresponding to the first item template; and present the first content of the personal information by the first information item after moving the first item template to the personal information display area according to the first input operation.

Abstract: An electronic device and a method for editing a resume are provided. The electronic device includes a display, a transceiver, a storage medium, and a processor. The processor receives personal information through the transceiver, and inputs the personal information into a plurality of item templates to generate an item template with personal information and a blank item template without personal information corresponding to the plurality of item templates. The processor displays the plurality of item templates through the display, and receives a first input operation to add a first item template and a second item template in the plurality of item templates to a resume display area to generate a resume. The processor outputs the resume through the transceiver.

Abstract: In example implementations, a computing device is provided. The computing device includes an expansion interface, a first device, a second device, and a processor communicatively coupled to the expansion interface. The expansion interface includes a plurality of slots. Two slots of the plurality of slots are controlled by a single reset signal. The first device is connected to a first slot of the two slots and has a feature that is compatible with the single reset signal. The second device is connected to a second slot of the two slots and does not have the feature compatible with the single reset signal. The process is to detect the first device connected to the first slot and the second device connected to the second slot and disable the feature by preventing the first slot and the second slot from receiving the single reset signal.

Abstract: In example implementations, a computing device is provided. The computing device includes an expansion interface, a first device, a second device, and a processor communicatively coupled to the expansion interface. The expansion interface includes a plurality of slots. Two slots of the plurality of slots are controlled by a single reset signal. The first device is connected to a first slot of the two slots and has a feature that is compatible with the single reset signal. The second device is connected to a second slot of the two slots and does not have the feature compatible with the single reset signal. The process is to detect the first device connected to the first slot and the second device connected to the second slot and disable the feature by preventing the first slot and the second slot from receiving the single reset signal.

Abstract: An electronic device and a method for editing a resume are provided. The electronic device includes a display, a transceiver, a storage medium, and a processor. The processor receives personal information through the transceiver, and inputs the personal information into a plurality of item templates to generate an item template with personal information and a blank item template without personal information corresponding to the plurality of item templates. The processor displays the plurality of item templates through the display, and receives a first input operation to add a first item template and a second item template in the plurality of item templates to a resume display area to generate a resume. The processor outputs the resume through the transceiver.

Abstract: In one example, an adapter card may include a circuit board having a male interface to be inserted into a discrete graphics card slot and a peripheral component interconnect express (PCIe) slot to communicatively couple a PCIe device. Further, the adapter card may include a voltage converter circuit disposed on the circuit board to convert a first voltage associated with the discrete graphics card slot to a second voltage corresponding to the PCIe device and a level shifter circuit disposed on the circuit board to modify a signal level in the discrete graphics card slot to a signal level in the PCIe device.

Abstract: In one example, an adapter card may include a circuit board having a male interface to be inserted into a discrete graphics card slot and a peripheral component interconnect express (PCIe) slot to communicatively couple a PCIe device. Further, the adapter card may include a voltage converter circuit disposed on the circuit board to convert a first voltage associated with the discrete graphics card slot to a second voltage corresponding to the PCIe device and a level shifter circuit disposed on the circuit board to modify a signal level in the discrete graphics card slot to a signal level in the PCIe device.

Abstract: A method is presented to estimate the remaining life of a moving power cable online. The cable is monitored online remotely for further providing suggestions to users for reducing times of power failure and economic loss. An offline AC impedance measurement experiment is designed at first. Three artificial neural networks are established for convert measured impedances into impedances under a baseline context to calculate impedance change ratios. The impedance change ratio indicates the damage of the cable. At last, a remaining margin of the impedance change ratio is figured out online under various contexts with three equations. Thus, the remaining life of the cable is obtained online.

Abstract: A method is presented to estimate the remaining life of a moving power cable online. The cable is monitored online remotely for further providing suggestions to users for reducing times of power failure and economic loss. An offline AC impedance measurement experiment is designed at first. Three artificial neural networks are established for convert measured impedances into impedances under a baseline context to calculate impedance change ratios. The impedance change ratio indicates the damage of the cable. At last, a remaining margin of the impedance change ratio is figured out online under various contexts with three equations. Thus, the remaining life of the cable is obtained online.

Abstract: An integrated fan-out package is described. The integrated fan-out package comprises a first die and a second die arranged adjacent to each other. A molding compound encapsulates the first and second dies. A redistribution structure is disposed over the molding compound and on the first and second dies. The redistribution structure comprises a first connection structure electrically connected to the first die, a second connection structure electrically connected to the second die and an inter-dielectric layer located between the first and second connection structures and separating the first connection structure from the second connection structure. The ball pad is disposed on the redistribution structure and electrically connected with the first die or the second die. The bridge structure is disposed on the first connection structure and on the second connection structure and electrically connects the first die with the second die.

Abstract: An integrated fan-out package is described. The integrated fan-out package comprises a first die and a second die arranged adjacent to each other. A molding compound encapsulates the first and second dies. A redistribution structure is disposed over the molding compound and on the first and second dies. The redistribution structure comprises a first connection structure electrically connected to the first die, a second connection structure electrically connected to the second die and an inter-dielectric layer located between the first and second connection structures and separating the first connection structure from the second connection structure. The ball pad is disposed on the redistribution structure and electrically connected with the first die or the second die. The bridge structure is disposed on the first connection structure and on the second connection structure and electrically connects the first die with the second die.

Abstract: An automatic image-capturing system is used for capturing an image and transmitting the image to a remote device. The automatic image-capturing system includes a photography module for capturing the image; a storage module for storing the image captured by the photography module; a transmission module for receiving a control instruction sent by the remote device; a master core module for making the photography module to capture the image based on the control instruction, and segmenting the image into a plurality of files and segmenting the files into a plurality of packets to be transmitted to the remote device by the transmission module, and a slave core module for monitoring the operations of the master core module to turn off and restart the master core module when there is an abnormal operation in the master core module.

Abstract: An automatic image-capturing system is used for capturing an image and transmitting the image to a remote device. The automatic image-capturing system includes a photography module for capturing the image; a storage module for storing the image captured by the photography module; a transmission module for receiving a control instruction sent by the remote device; a master core module for making the photography module to capture the image based on the control instruction, and segmenting the image into a plurality of files and segmenting the files into a plurality of packets to be transmitted to the remote device by the transmission module, and a slave core module for monitoring the operations of the master core module to turn off and restart the master core module when there is an abnormal operation in the master core module.

Abstract: Interposers for semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, an interposer includes a substrate, a contact pad disposed on the substrate, and a first through-via in the substrate coupled to the contact pad. A first fuse is coupled to the first through-via. A second through-via in the substrate is coupled to the contact pad, and a second fuse is coupled to the second through-via.

Abstract: Interposers for semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, an interposer includes a substrate, a contact pad disposed on the substrate, and a first through-via in the substrate coupled to the contact pad. A first fuse is coupled to the first through-via. A second through-via in the substrate is coupled to the contact pad, and a second fuse is coupled to the second through-via.