Patents by Inventor Chun-Ying Chen
Chun-Ying Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150009059Abstract: A system includes a pipeline analog-to-digital converter as a first stage to process an input signal, and a successive approximation register (SAR) analog-to-digital converter as a second stage to process the input signal. The SAR analog-to-digital converter includes a power adjustment element to adjust a reference voltage of the SAR analog-to-digital converter to match a full scale voltage of the pipeline-analog-to-digital converter.Type: ApplicationFiled: September 9, 2013Publication date: January 8, 2015Applicant: Broadcom CorporationInventors: Chun-Ying Chen, Wei-Ta Shih, Rong Wu, Young Shin, Karthik Raviprakash, Tao Wang, Chia-Jen Hsu, Tianwei Li
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Publication number: 20140340252Abstract: The present disclosure provides for an analog-to-digital converter (ADC) which selectively compresses an analog input signal to improve noise performance and dynamic input range. The ADC selectively scales an analog input signal when it is closer to an expected value of one or more signal metrics more than when it is further from the expected value of the one or more signal metrics. For example, during the conversion process, the ADC amplifies the analog input signal when it is closer to a mean value ? by a gain factor while selectively adjusting the gain factor when the analog input signal is further from its mean value ? to selectively compress the analog input signal. This selective compression improves input noise performance and dynamic input range of the ADC when compared to the conventional ADC.Type: ApplicationFiled: June 28, 2013Publication date: November 20, 2014Inventors: Ayaskant SHRIVASTAVA, Chun-Ying Chen
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Patent number: 8878707Abstract: A system includes a first storage element to store an input signal for a first sampling lane for a SHA-less stage. A first switch is connected with the first storage element, the first switch to control when the first storage element stores the input signal for sampling on the first sampling lane. A second switch is connected in series with the first switch, the second switch to control an instance for sampling the input signal stored on the first storage element for the first sampling lane.Type: GrantFiled: August 15, 2013Date of Patent: November 4, 2014Assignee: Broadcom CorporationInventors: Tao Wang, Chun-Ying Chen, Massimo Brandolini, Wei-Te Chou
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Publication number: 20140295433Abstract: A detection method for cancer is provided. Magnetic carbon beads are used. The carbon beads are highly specified to a cancer. Surface area of grafted antigen are broadened by grafting functional molecules. Number of antigen is increased on the surface. Thus, the present invention improves sensitivity and accuracy of disease detection and greatly saves cost. The present invention can be applied for sample purification or massive disease detection.Type: ApplicationFiled: August 5, 2013Publication date: October 2, 2014Applicant: Institute of Nuclear Energy Research, Atomic Energy Council, Executive Yuan, R.O.C.Inventors: Chun-Ying Chen, Kuan-Yin Chen, Meng-Jun Fu, Chin-Yan Tsai, Feng-Huei Lin, Chia-Ching Liu
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Publication number: 20140295574Abstract: A method is provided for modifying a radioactive carbon nanotube (CNT) carrier. Magnetic molecules are used. The modified CNT is highly specified to disease. Surface of the CNT has functional grafts for catching antigen/antibody. Antigen/antibody thus caught on the surface is increased in number. Thus, the present invention improves sensitivity and accuracy of disease detection and greatly saves cost. The present invention can be applied for sample purification or massive disease detection.Type: ApplicationFiled: August 5, 2013Publication date: October 2, 2014Applicant: Institute of Nuclear Energy Research, Atomic Energy Council, Executive Yuan, R.O.C.Inventors: Kuan-Yin Chen, Chun-Ying Chen, Meng-Jun Fu, Feng-Huei Lin, Chia-Ching Liu
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Patent number: 8730073Abstract: A method for digitizing an analog signal through a pipelined analog-to-digital converter (ADC) may include pipelining a sample sub-stage, a quantization sub-stage and an amplification sub-stage to an ADC lane. Within a first of multiple pipelined stages, clock phases may be assigned to the ADC lane, including a sample clock phase, a quantization clock phase, and an amplification clock phase such that the quantization clock phase is non-overlapping with the sample clock phase and the amplification clock phase. The non-overlapping feature may be facilitated by generating multiple reference clock phases for the sub-stages of multiple ADC lanes, and interleaving assignment of the sample clock phase, the quantization clock phase, and the amplification clock phase to the reference clock phases among the multiple lanes.Type: GrantFiled: January 10, 2013Date of Patent: May 20, 2014Assignee: Broadcom CorporationInventors: Tao Wang, Chun-Ying Chen, Jiangfeng Wu
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Patent number: 8717209Abstract: Various pipeline ADCs are disclosed that substantially compensate for interference or distortion that results from imperfections with various ADC modules of the pipeline ADCs. The pipeline ADCs include various ADC stages and various compensation stages that are coupled to the various ADC stages. The various ADC stages convert their corresponding analog inputs from an analog signal domain to a digital signal domain to provide various digital output signals and various analog residual signals to subsequent ADC stages. The various compensation stages compensate for interference or distortion that is impressed onto the various analog residual signals which results from imperfections within previous ADC stages.Type: GrantFiled: September 5, 2012Date of Patent: May 6, 2014Assignee: Broadcom CorporationInventors: Jiangfeng Wu, Tianwei Li, Wenbo Liu, Wei-Ta Shih, Chun-Ying Chen, Lin He, Randall Perlow, Binning Chen, Ramon Gomez
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Publication number: 20140062738Abstract: Various pipeline ADCs are disclosed that substantially compensate for interference or distortion that results from imperfections with various ADC modules of the pipeline ADCs. The pipeline ADCs include various ADC stages and various compensation stages that are coupled to the various ADC stages. The various ADC stages convert their corresponding analog inputs from an analog signal domain to a digital signal domain to provide various digital output signals and various analog residual signals to subsequent ADC stages. The various compensation stages compensate for interference or distortion that is impressed onto the various analog residual signals which results from imperfections within previous ADC stages.Type: ApplicationFiled: September 5, 2012Publication date: March 6, 2014Applicant: Broadcom CorporationInventors: Jiangfeng WU, Tianwei LI, Wenbo LIU, Wei-Ta SHIH, Chun-Ying CHEN, Lin HE, Randall PERLOW, Binning CHEN, Ramon GOMEZ
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Patent number: 8536614Abstract: A nitride semiconductor light emitting device including an n-type nitride semiconductor layer, a p-type nitride semiconductor layer, a light emitting semiconductor layer, a first metal pad, a second metal pad, and a first magnetic material layer is provided. The light emitting semiconductor layer is disposed between the n-type nitride semiconductor layer and the p-type nitride semiconductor layer. The first metal pad is electrically connected to the n-type nitride semiconductor layer. The second metal pad is electrically connected to the p-type nitride semiconductor layer. The first magnetic material layer is disposed between the first metal pad and the n-type nitride semiconductor layer. A distribution area of the first magnetic material layer parallel to a (0001) plane of the n-type nitride semiconductor layer is greater than or equal to an area of the first metal pad parallel to the (0001) plane.Type: GrantFiled: December 29, 2011Date of Patent: September 17, 2013Assignees: Industrial Technology Research Institute, National Cheng-Kung UniversityInventors: Chih-Hao Hsu, Rong Xuan, Yu-Hsiang Chang, Jung-Chun Huang, Chun-Ying Chen
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Patent number: 8427228Abstract: According to one disclosed embodiment, an adaptive voltage rail circuit for integrating low voltage devices with high voltage analog circuits is described. This adaptive voltage rail circuit includes a high voltage analog circuit having a common mode voltage. Further included is a first voltage rail having a first rail voltage which is based on and greater than the common mode voltage of the high voltage analog circuit. A second voltage rail having a second rail voltage which is based on and less than the same common mode voltage is also present. By connecting these first and second voltage rails across at least one low voltage device, an adaptive voltage rail circuit is able to safely integrate low voltage devices with high voltage analog circuits in the same system.Type: GrantFiled: March 28, 2011Date of Patent: April 23, 2013Assignee: Broadcom CorporationInventors: Chun-Ying Chen, Jiangfeng Wu
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Publication number: 20130085703Abstract: Embodiments provide histogram-based methods and system to estimate the transfer function of an ADC, and subsequently to linearize a non-linear ADC transfer function. Embodiments include blind algorithms that require no a priori knowledge of the input signal distribution. Embodiments can be implemented using cumulative (i.e., cumulative distribution function (CDF)) or non-cumulative (i.e., probability density function (PDF)) histograms. According to embodiments, a non-linear transfer function can be estimated by linearly approximating successive local intervals of the transfer function. Linearly approximated successive local intervals of the transfer function can then be used to fully characterize and closely estimate the transfer function.Type: ApplicationFiled: September 30, 2011Publication date: April 4, 2013Applicant: Broadcom CorporationInventors: Ray (Ramon) GOMEZ, Bruce J. Currivan, Lin He, Loke Tan, Frank Van der Goes, Cy (Chun-Ying) Chen, Jiangfeng Wu, Thomas Kolze
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Publication number: 20120329533Abstract: A system for operating a portable communication device includes a module to operate the portable communication device in a first mode. The system may provide telephony service to a user at a first performance level. The system may determine to operate the portable communication device in a power-save mode that is different from the first mode. The system may operate the portable communication device in the power-save mode and provide telephony service to the user at a second performance level different from the first performance level.Type: ApplicationFiled: September 7, 2012Publication date: December 27, 2012Applicant: Broadcom CorporationInventors: Chun-ying Chen, Pieter Vorenkamp, Neil Y. Kim, Sumant Ranganathan
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Patent number: 8286013Abstract: A system and method for providing multi-tiered power save operation in a portable communication device. A portable communication device may be operated in a first power-save mode. A power-save module of the portable communication device may, for example, provide for operation in such a first power-save mode. It may be determined to operate the portable communication device in a second power-save mode that is different than the first power-save mode. A power-save management module may, for example, make such a determination. The portable communication device may then be operated in the second power-save mode. The power-save module may, for example, provide for operation in such a second power-save mode.Type: GrantFiled: June 24, 2005Date of Patent: October 9, 2012Assignee: Broadcom CorporationInventors: Chun-ying Chen, Pieter Vorenkamp, Neil Y. Kim, Sumant Ranganathan
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Patent number: 8254513Abstract: Inter-device adaptable interfacing clock skewing. The invention is operable in either one of both of a transmit mode and a receive mode to perform skewing of a transmitted and/or a received signal. The operational parameters including frequency and phase may be determined during auto detect/auto negotiation, they may be programmed externally, or they may be user selected in various embodiments. A device may include a clock generator, one or more divider, and one or more delay cells internally to the device. If desired, a high frequency clock is generated within the device and then divided down to generate the appropriate clock signal that supports the communication and interaction between multiple devices. Registers and/or pins may be used to select the clock frequency and phase of output clock signals. The present invention supports multiple Ethernet protocols between multiple devices including 10BaseT, 100BaseT, and 1000BaseT.Type: GrantFiled: July 5, 2010Date of Patent: August 28, 2012Assignee: Broadcom CorporationInventors: Andrew J. Castellano, Pieter Vorenkamp, Chun-Ying Chen
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Patent number: 8250499Abstract: A system and method for storing power utilization information in an integrated circuit and utilizing such information. Various aspects of the present invention provide an integrated circuit that comprises a first module, which stores power utilization information for at least a portion of the integrated circuit. A second module of the integrated circuit may communicate the power utilization information with an electrical device external to the integrated circuit. Various aspects of the present invention provide a method for storing power utilization information in an integrated circuit. For example, a performance characteristic and/or a power supply characteristic may be monitored as the integrated circuit is utilized. Power utilization information may be determined from the monitored characteristic(s), and the power utilization information may be stored in the integrated circuit.Type: GrantFiled: April 11, 2011Date of Patent: August 21, 2012Assignee: Broadcom CorporationInventors: Chun-ying Chen, Pieter Vorenkamp, Neil Y. Kim, Sumant Ranganathan
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Patent number: 8233578Abstract: A phase lock loop frequency synthesizer includes a phase rotator in the feedback path of the PLL. The PLL includes a phase detector, a low pass filter, a charge pump, a voltage controlled oscillator (“VCO”), and a feedback path connecting output of the VCO to the phase detector. The feedback path includes a phase rotator connected to the output of the VCO and to an input of a frequency divider. Coarse frequency control is implemented by adjusting the input reference frequency to the phase detector or by adjusting the divider ratio of the frequency divider. Fine frequency control is achieved by increasing or decreasing the rotation speed of the phase rotator. The phase rotator constantly rotates phase of the VCO output, thereby causing a frequency shift at the output of the phase rotator.Type: GrantFiled: January 5, 2007Date of Patent: July 31, 2012Assignee: Broadcom CorporationInventors: Chun-Ying Chen, Michael Q. Le, Myles Wakayama
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Patent number: 8181045Abstract: A circuit and method utilizing a power control data bus for implementing power control. Various aspects of the present invention provide an electrical circuit that comprises a power supply circuit that outputs electrical power. The electrical circuit may also comprise an integrated circuit that receives electrical power from the power supply circuit. The electrical circuit may also comprise a power control data bus, which communicatively couples a power control data bus interface of the power supply circuit and a power control data bus interface of the integrated circuit. The power control data bus may, for example, carry power control data between the integrated circuit and the power supply circuit. Various aspects of the present invention also provide a method that comprises communicating power control data over a power control data bus and utilizing the power control data to control characteristics of electrical power provided to an integrated circuit or module.Type: GrantFiled: March 15, 2010Date of Patent: May 15, 2012Assignee: Broadcom CorporationInventors: Neil Y. Kim, Pieter Vorenkamp, Sumant Ranganathan, Chun-ying Chen
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Patent number: 8179293Abstract: In an embodiment, an apparatus and method reduces a calibration settling time in an analog-to-digital converter (ADC). The ADC has a reference voltage supply. The reference voltage supply has an output. A filter capacitor is coupled to the reference voltage supply output. An isolation transistor is series-coupled between the filter capacitor and ground. The isolation transistor isolates the filter capacitor during calibration of the ADC.Type: GrantFiled: November 24, 2010Date of Patent: May 15, 2012Assignee: Broadcom CorporationInventor: Chun-Ying Chen
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Publication number: 20120098024Abstract: A nitride semiconductor light emitting device including an n-type nitride semiconductor layer, a p-type nitride semiconductor layer, a light emitting semiconductor layer, a first metal pad, a second metal pad, and a first magnetic material layer is provided. The light emitting semiconductor layer is disposed between the n-type nitride semiconductor layer and the p-type nitride semiconductor layer. The first metal pad is electrically connected to the n-type nitride semiconductor layer. The second metal pad is electrically connected to the p-type nitride semiconductor layer. The first magnetic material layer is disposed between the first metal pad and the n-type nitride semiconductor layer. A distribution area of the first magnetic material layer parallel to a (0001) plane of the n-type nitride semiconductor layer is greater than or equal to an area of the first metal pad parallel to the (0001) plane.Type: ApplicationFiled: December 29, 2011Publication date: April 26, 2012Applicants: National Cheng-Kung University, Industrial Technology Research InstituteInventors: Chih-Hao Hsu, Rong Xuan, Yu-Hsiang Chang, Jung-Chun Huang, Chun-Ying Chen
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Patent number: 8145921Abstract: A system and method for implementing a common control bus in a multi-regulator power supply integrated circuit. The integrated circuit may, for example, comprise first and second power regulator modules that control at least one characteristic of respective power signals. The integrated circuit may also, for example, comprise a communication interface module that receives power control information related to operation of the first and second power regulator modules over a shared data bus. An exemplary method may, for example, comprise receiving power control information over a data bus. The method may also, for example, comprise determining which of a plurality of power regulators corresponds to the received power control information. The method may further, for example, comprise determining a regulator control signal, based at least in part on the received power control information, and provide the regulator control signal to the determined regulator(s) to control operation of the determined regulator(s).Type: GrantFiled: March 10, 2009Date of Patent: March 27, 2012Assignee: Broadcom CorporationInventors: Chun-ying Chen, Pieter Vorenkamp, Neil Y. Kim, Sumant Ranganathan