Patents by Inventor Chun Ying KAN

Chun Ying KAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240162217
    Abstract: A semiconductor device includes a substrate, two first voltage-to-current converters and two second voltage-to-current converters. The substrate includes four layout regions arranged in an array having a plurality of columns and a plurality of rows. The array is line-symmetrical with respect to a first axis and line-symmetrical with respect to a second axis, wherein the first axis perpendicularly intersects the second axis at an array center point of the array. The two first voltage-to-current converters are respectively arranged in two of the four layout regions, wherein layouts of the two first voltage-to-current converters on the substrate are point-symmetrical with respect to the array center point. The two second voltage-to-current converters are respectively arranged in the other two of the four layout regions, wherein layouts of the two second voltage-to-current converters on the substrate are point-symmetrical with respect to the array center point.
    Type: Application
    Filed: September 26, 2023
    Publication date: May 16, 2024
    Inventors: Tzu-Chieh WEI, Chun Ying KAN
  • Publication number: 20240162216
    Abstract: A semiconductor device includes a substrate, two first voltage-to-current converters, two second voltage-to-current converters and two third voltage-to-current converters. The substrate includes six layout regions arranged as an array having a plurality of columns and a plurality of rows, the array is line-symmetrical with respect to a first axis and a second axis which are perpendicularly intersected at an array center point of the array. The two first voltage-to-current converters, the two second voltage-to-current converters and the two third voltage-to-current converters are respectively arranged in the six layout regions. With respect to the array center point, layouts of the two first voltage-to-current converters are point-symmetrical, layouts of the two second voltage-to-current converters are point-symmetrical, and layouts of the two third voltage-to-current converters are point-symmetrical.
    Type: Application
    Filed: September 26, 2023
    Publication date: May 16, 2024
    Inventors: Tzu-Chieh WEI, Chun Ying KAN