Abstract: A system and a method for parameter optimization with adaptive search space and a user interface using the same are provided. The system includes a data acquisition unit, an adaptive adjustment unit and an optimization search unit. The data acquisition unit obtains a set of executed values of several operating parameters and a target parameter. The adaptive adjustment unit includes a parameter space transformer and a search range definer. The parameter space transformer performs a space transformation on a parameter space of the operating parameters according to the executed values. The search range definer defines a parameter search range in a transformed parameter space based on the sets of the executed values. The optimization search unit takes the parameter search range as a limiting condition and takes optimizing the target parameter as a target to search for a set of recommended values of the operating parameters.

Abstract: A gate structure includes a substrate divided into an N-type transistor region and a P-type transistor region. An interlayer dielectric covers the substrate. A first trench is embedded in the interlayer dielectric within the N-type transistor region. A first gate electrode having a bullet-shaped profile is disposed in the first trench. A gate dielectric contacts the first trench. An N-type work function layer is disposed between the gate dielectric layer and the first gate electrode. A second trench is embedded in the interlayer dielectric within the P-type transistor region. A second gate electrode having a first mushroom-shaped profile is disposed in the second trench. The gate dielectric layer contacts the second trench. The N-type work function layer is disposed between the gate dielectric layer and the second gate electrode. A first P-type work function layer is disposed between the gate dielectric layer and the N-type work function layer.

Abstract: The present disclosure provides a semiconductor device and a method for forming a semiconductor device. The semiconductor device includes a substrate, and a first gate dielectric stack over the substrate, wherein the first gate dielectric stack includes a first ferroelectric layer, and a first dielectric layer coupled to the first ferroelectric layer, wherein the first ferroelectric layer includes a first portion made of a ferroelectric material in orthorhombic phase, a second portion made of the ferroelectric material in monoclinic phase, and a third portion made of the ferroelectric material in tetragonal phase, wherein a total volume of the second portion is greater than a total volume of the first portion, and the total volume of the first portion is greater than a total volume of the third portion.

Abstract: A mixed-precision quantization method for a neural network is provided. The neural network has a first precision and includes several layers and an original final output. For a particular layer, quantization of second precision on the particular layer and an input is performed. An output of the particular layer is obtained according to the particular layer of second precision and the input. De-quantization on the output of the particular layer is performed, and the de-quantized output is inputted to a next layer to obtain a final output. A value of an objective function is obtained according to the final output and the original final output. Above steps are repeated until the value of the objective function of each layer is obtained. A precision of quantization for each layer is decided according to the value of the objective function. The precision of quantization is one of first to fourth precision.

Abstract: The invention relates to a deep-learning-based driving assistance system and method thereof. The system adopts a one-stage object detection neural network, and is applied to an embedded device for quickly calculating and determining a driving object information. The system comprises an image capture module, a feature extraction module, a semantic segmentation module, and a lane processing module, wherein the lane processing module further comprises a lane line binary sub-module, a lane line clustering sub-module, and a lane line fitting sub-module.

Abstract: A status switching method for a mobile device is disclosed. The status switching method includes receiving a first request for switching a radio function of the mobile device from a first status to a second status; keeping the radio function in the first status for a specific duration; switching the radio function to the second status if not receiving a second request for switching the radio function of the mobile device from the second status to the first status during the specific duration; and remaining the radio function in the first status if receiving a second request for switching the radio function of the mobile device from the second status to the first status during the specific duration; and switching the radio function to the first status.

Abstract: A status switching method for a mobile device is disclosed. The status switching method includes receiving a first request for switching a radio function of the mobile device from a first status to a second status; keeping the radio function in the first status for a specific duration; switching the radio function to the second status if not receiving a second request for switching the radio function of the mobile device from the second status to the first status during the specific duration; and remaining the radio function in the first status if receiving a second request for switching the radio function of the mobile device from the second status to the first status during the specific duration; and switching the radio function to the first status.

Abstract: The present invention provides a method for supporting multiple communication systems in a mobile communication device. The method includes providing at least two communication channels, each communication channel comprising a communication module; receiving a communication request; directing the communication request to a selected communication channel among the at least two communication channels according to a communication type information; and transmitting data associated with the communication request through the selected communication channel. Wherein each communication module of the at least two communication channels supports different transmission protocol.

Abstract: A calibration method of insulating washer in a circuit board is provided, which includes steps of (a) establishing an equivalent circuit model corresponding to a metal via; (b) depicting an electric characteristic curve corresponding to the model; (c) calculating a capacitance and an inductance equation corresponding to the curve; (d) substituting parameter values of the equivalent circuit model, capacitance equation, and inductance equation into a characteristic impedance expression for being calculated, so as to obtain a first radius length value of an insulating washer for the metal via; (e) making a temporary insulating washer by employing the value; (f) reestablishing an equivalent circuit model corresponding to the metal via according to the temporary insulating washer; repeating Steps (b), (c), (d), (e), and (f); and when the first radius length value is converged into a fixed value, determining the fixed value as an optimum value for designing the insulating washer.

Abstract: A calibration method of insulating washer in a circuit board is provided, which includes steps of (a) establishing an equivalent circuit model corresponding to a metal via; (b) depicting an electric characteristic curve corresponding to the model; (c) calculating a capacitance and an inductance equation corresponding to the curve; (d) substituting parameter values of the equivalent circuit model, capacitance equation, and inductance equation into a characteristic impedance expression for being calculated, so as to obtain a first radius length value of an insulating washer for the metal via; (e) making a temporary insulating washer by employing the value; (f) reestablishing an equivalent circuit model corresponding to the metal via according to the temporary insulating washer; repeating Steps (b), (c), (d), (e), and (f); and when the first radius length value is converged into a fixed value, determining the fixed value as an optimum value for designing the insulating washer.

Abstract: A DC power plane structure applied in multi-layer circuit board is provided. The DC power plane structure includes a first circuit area for receiving a DC power, a noise filter with one end electrically connected to a DC power output end of the first circuit area, and a second circuit area which is electrically isolated from the first circuit area. The second circuit area has a band gap structure, and the DC power input end of the band gap structure is electrically connected to the other end of the noise filter for inhibiting high-frequency noise generated between layers of the multi-layer circuit board.

Abstract: An across-trench circuit for high-speed signal transmission applicable to a multi-layer circuit board, such as high-speed digital circuit board, for installing an across-trench signal transmission circuit on the high-speed digital circuit board is disclosed, wherein a pair of coplanar waveguide circuit formed on both sides of signal circuit crossing a trench, so as to reduce ground bounce noise of signal transmission for the high-speed digital circuit board, and thereby increases the quality of transmitting the signals and reduces the ground bounce noise and damage of reflection and interference.

Abstract: A computer-aided ultrahigh-frequency circuit model simulation method and system is proposed, which is designed for use in conjunction with a computer platform for providing a user-operated ultrahigh-frequency circuit model simulation function, which is characterized by the provision of a graphic interface that allows the user to select a desired circuit model and input a set of design parameters about the selected circuit model, and whereupon a set of operating characteristics data can be automatically determined through simulation. This feature allows the circuit design engineer unnecessary to write lengthy circuit model description files for the description of the intended circuit models, thereby making the simulation of high-speed digital circuit models more convenient and efficient.

Abstract: A capacitance-compensated differential circuit line layout structure is proposed, which is designed for use on a circuit board, such as a high-speed digital circuit board, for the layout of a pair of differential circuit lines on the high-speed digital circuit board, and which is characterized by the provision of a branched electrically-conductive pad at the bent portion of the radially-side one of the two differential circuit lines (i.e., the shorter one of the two circuit lines), for the purpose of providing the shorter one of the circuit lines with a capacitive effect that can cause a time delay to the ultra-high frequency digital signal passing therethrough, thereby eliminating the undesired effects of phase skew and signal reflection. In addition, this feature also allows the layout work of the differential pair of circuit lines to be more simplified and thus easier to implement than the prior art.