Abstract: An electronic device includes a first insulating layer, a first conductive portion, a second conductive portion, a transistor, and an electronic unit. The first insulating layer has a first opening penetrating the first insulating layer along a first direction. The first conductive portion is disposed in the first opening. The second conductive portion is electrically connected to the first conductive portion. The transistor is electrically connected to the second conductive portion. The electronic unit is electrically connected to the first conductive portion. In a cross-sectional view of the electronic device, the electronic unit and the second conductive portion are disposed on two opposite sides of the first insulating layer respectively, the first conductive portion has a first length along a second direction perpendicular to the first direction, the second conductive portion has a second length along the second direction, and the first length is different from the second length.

Abstract: A method of making a semiconductor device includes forming a circuit layer over a substrate. The method further includes depositing an insulator over the substrate. The method further includes patterning the insulator to define a test line trench, a first trench, and a second trench, wherein the first trench is on a portion of the substrate exposed by the circuit layer. The method further includes filling the test line trench to define a test line electrically connected to the circuit layer. The method further includes filling the first trench and the second trench to define a capacitor.

Abstract: In some implementations, one or more semiconductor processing tools may form a metal cap on a metal gate. The one or more semiconductor processing tools may form one or more dielectric layers on the metal cap. The one or more semiconductor processing tools may form a recess to the metal cap within the one or more dielectric layers. The one or more semiconductor processing tools may perform a bottom-up deposition of metal material on the metal cap to form a metal plug within the recess and directly on the metal cap.

Abstract: A touch display device is provided in this disclosure. The touch display device includes a substrate, a first conductive layer, a second conductive layer, a stacked structure, an inorganic light emitting unit, and a touch sensing circuit. The first conductive layer is disposed on the substrate. The first conductive layer includes a gate electrode. The second conductive layer is disposed on the first conductive layer. The second conductive layer includes a source electrode and a drain electrode. The stacked structure is disposed on the substrate. The stacked structure includes a conductive channel and a sensing electrode. The inorganic light emitting unit is disposed on the stacked structure. The inorganic light emitting unit is electrically connected with the drain electrode via the conductive channel. The touch sensing circuit is electrically connected with the sensing electrode.

Abstract: A semiconductor device includes a substrate. The semiconductor device further includes a circuit layer over the substrate. The semiconductor device further includes a test line electrically connected to the circuit layer. The semiconductor device further includes a capacitor on the substrate. The capacitor includes a first conductor, wherein the first conductor is on a portion of the substrate exposed by the circuit layer. The capacitor further includes an insulator surrounding the first conductor.

Abstract: A base structure in an electroplating system is provided. The base structure includes: includes: an annular member; a contact ring attached to an inner surface of the annular member and configured to be electrically connected to a wafer in an electroplating process; and a pair of shield structures attached to an upper surface of the annular member and extending in an vertical direction. Each of the pair of shield structures includes: a curved plate comprising a plurality of discharging openings, wherein plating solution residual is discharged through the plurality of discharging openings in a cleaning procedure; and a plurality of bevels, each of the plurality of bevels corresponding to each of the plurality of discharging openings and configured to guide the plating solution residual toward the corresponding discharging opening in the cleaning procedure.

Abstract: A semiconductor device includes a substrate. The semiconductor device further includes a circuit layer over the substrate. The semiconductor device further includes a test line electrically connected to the circuit layer. The semiconductor device further includes a capacitor on the substrate. The capacitor includes a first conductor, wherein the first conductor is on a portion of the substrate exposed by the circuit layer. The capacitor further includes an insulator surrounding the first conductor.

Abstract: A semiconductor device includes a substrate. The semiconductor device further includes a circuit layer over the substrate. The semiconductor device further includes a test line on the circuit layer. The semiconductor device further includes a capacitor on the substrate. The capacitor includes a first conductor, wherein the first conductor is on a portion of the substrate exposed by the circuit layer; a second conductor; and an insulator between the first conductor and the second conductor, wherein the insulator surrounds the first conductor and the second conductor.

Abstract: A semiconductor device includes a semiconductor substrate, a device layer over the semiconductor substrate, a first color filter in a top surface of the device layer and adjacent to an edge of the device layer, and a second color filter in the top surface of the device layer. The second color filter has substantially the same thickness and the same color as the first color filter.

Abstract: A semiconductor device includes a substrate. The semiconductor device further includes a circuit layer over the substrate. The semiconductor device further includes a test line on the circuit layer. The semiconductor device further includes a capacitor on the substrate. The capacitor includes a first conductor, wherein the first conductor is on a portion of the substrate exposed by the circuit layer; a second conductor; and an insulator between the first conductor and the second conductor, wherein the insulator surrounds the first conductor and the second conductor.

Abstract: A metal-insulator-metal (MIM) capacitor includes a semiconductor substrate and a capacitor device. The capacitor device includes a first conductor upright on the semiconductor substrate, a second conductor upright on the semiconductor substrate, and an insulator disposed used for insulating the first conductor from the second conductor. In a method for fabricating the capacitor device, a mask including a test line pattern and a capacitor pattern with a first trench pattern and a second trench pattern is used to form a test line and the first conductor and the second conductor of the capacitor device, thereby decreasing the cost of for fabricating the MIM capacitor.

Abstract: A semiconductor device includes a substrate, a device layer, color filters and a passivation layer. The device overlies the substrate, and has a first surface and a second surface opposite to the first surface. The device layer includes a grid structure disposed on the second surface of the device layer, and the grid structure includes cavities. The first surface of the device layer is adjacent to the substrate. The color filters fill in the cavities. The passivation layer is disposed on the second surface of the device layer, and covers the grid structure and the color filters.

Abstract: A semiconductor device includes a semiconductor substrate, a device layer over the semiconductor substrate, a first color filter in a top surface of the device layer and adjacent to an edge of the device layer, and a second color filter in the top surface of the device layer. The second color filter has substantially the same thickness and the same color as the first color filter.

Abstract: Backside illuminated image sensor structures are provided. The backside illuminated image sensor structure includes a device substrate having a frontside and a backside and pixels formed at the frontside of the substrate. The backside illuminated image sensor structure further includes a metal element formed in a dielectric layer over the backside of the substrate and a color filter layer formed over the dielectric layer. In addition, the metal element is configured to form a light blocking area in the device substrate and is made of copper.

Abstract: A semiconductor device includes a substrate, a device layer, color filters and a passivation layer. The device overlies the substrate, and has a first surface and a second surface opposite to the first surface. The device layer includes a grid structure disposed on the second surface of the device layer, and the grid structure includes cavities. The first surface of the device layer is adjacent to the substrate. The color filters fill in the cavities. The passivation layer is disposed on the second surface of the device layer, and covers the grid structure and the color filters.

Abstract: Backside illuminated image sensor structures are provided. The backside illuminated image sensor structure includes a device substrate having a frontside and a backside and pixels formed at the frontside of the substrate. The backside illuminated image sensor structure further includes a metal element formed in a dielectric layer over the backside of the substrate and a color filter layer formed over the dielectric layer. In addition, the metal element is configured to form a light blocking area in the device substrate and is made of copper.

Abstract: Embodiments of mechanisms of a backside illuminated image sensor structure are provided. The backside illuminated image sensor structure includes a device substrate having a frontside and a backside and pixels formed at the frontside of the substrate. The backside illuminated image sensor structure further includes a metal element formed in a dielectric layer over the backside of the substrate and a color filter layer formed over the dielectric layer. In addition, the metal element is configured to form a light blocking area in the device substrate and is made of copper.

Abstract: Embodiments of mechanisms of a backside illuminated image sensor structure are provided. The backside illuminated image sensor structure includes a device substrate having a frontside and a backside and pixels formed at the frontside of the substrate. The backside illuminated image sensor structure further includes a metal element formed in a dielectric layer over the backside of the substrate and a color filter layer formed over the dielectric layer. In addition, the metal element is configured to form a light blocking area in the device substrate and is made of copper.

Abstract: A metal-insulator-metal (MIM) capacitor includes a semiconductor substrate and a capacitor device. The capacitor device includes a first conductor upright on the semiconductor substrate, a second conductor upright on the semiconductor substrate, and an insulator disposed used for insulating the first conductor from the second conductor. In a method for fabricating the capacitor device, a mask including a test line pattern and a capacitor pattern with a first trench pattern and a second trench pattern is used to form a test line and the first conductor and the second conductor of the capacitor device, thereby decreasing the cost of for fabricating the MIM capacitor.