Patents by Inventor Chun Yuan TSAI

Chun Yuan TSAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10032652
    Abstract: The present disclosure relates to semiconductor packages and methods of manufacturing the same. In an embodiment, the semiconductor package includes a substrate, a semiconductor element, at least one connecting element, and an encapsulant. The semiconductor element is mounted to the substrate. The connecting element is disposed on the substrate and adjacent to the semiconductor element. The encapsulant covers at least a portion of the semiconductor element and at least a portion of the connecting element and defines at least one first groove surrounding the connecting element.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: July 24, 2018
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wen Tsung Hsu, Cheng-Hsien Yu, Chun Yuan Tsai, Tzung Shiou Tsai, Jia Hao Ye, Kuang Yi Hou
  • Patent number: 9922917
    Abstract: The present disclosure relates to a semiconductor package. In an embodiment, the semiconductor package includes a substrate having a lateral surface and an upper surface, a semiconductor device mounted to the substrate, and a molding compound covering the lateral surface and the upper surface of the substrate and at least a portion of the semiconductor device. A surface of the semiconductor device is substantially coplanar with a surface of the molding compound.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: March 20, 2018
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Hsien Yu, Wen Tsung Hsu, Chun Yuan Tsai
  • Publication number: 20160372397
    Abstract: The present disclosure relates to a semiconductor package. In an embodiment, the semiconductor package includes a substrate having a lateral surface and an upper surface, a semiconductor device mounted to the substrate, and a molding compound covering the lateral surface and the upper surface of the substrate and at least a portion of the semiconductor device. A surface of the semiconductor device is substantially coplanar with a surface of the molding compound.
    Type: Application
    Filed: August 29, 2016
    Publication date: December 22, 2016
    Inventors: Cheng-Hsien YU, Wen Tsung HSU, Chun Yuan TSAI
  • Patent number: 9443785
    Abstract: The present disclosure relates to a semiconductor package. In an embodiment, the semiconductor package includes a substrate, a semiconductor device, a thermal conductive element and a molding compound. The semiconductor device is mounted to the substrate. The thermal conductive element is disposed above the semiconductor device. The molding compound covers a side surface of the substrate and at least a part of a side surface of the semiconductor device.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: September 13, 2016
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Hsien Yu, Wen Tsung Hsu, Chun Yuan Tsai
  • Publication number: 20160181176
    Abstract: The present disclosure relates to a semiconductor package. In an embodiment, the semiconductor package includes a substrate, a semiconductor device, a thermal conductive element and a molding compound. The semiconductor device is mounted to the substrate. The thermal conductive element is disposed above the semiconductor device. The molding compound covers a side surface of the substrate and at least a part of a side surface of the semiconductor device.
    Type: Application
    Filed: December 19, 2014
    Publication date: June 23, 2016
    Inventors: Cheng-Hsien YU, Wen Tsung HSU, Chun Yuan TSAI
  • Publication number: 20160163612
    Abstract: The present disclosure relates to semiconductor packages and methods of manufacturing the same. In an embodiment, the semiconductor package includes a substrate, a semiconductor element, at least one connecting element, and an encapsulant. The semiconductor element is mounted to the substrate. The connecting element is disposed on the substrate and adjacent to the semiconductor element. The encapsulant covers at least a portion of the semiconductor element and at least a portion of the connecting element and defines at least one first groove surrounding the connecting element.
    Type: Application
    Filed: December 5, 2014
    Publication date: June 9, 2016
    Inventors: Wen Tsung HSU, Cheng-Hsien YU, Chun Yuan TSAI, Tzung Shiou TSAI, Jia Hao YE, Kuang Yi HOU