Patents by Inventor Chuncao NIU

Chuncao NIU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SEMICONDUCTOR PACKAGE WITH GUIDE PIN
    Publication number: 20230317579
    Abstract: A semiconductor guide pin is disclosed. Specific implementations may include a heatsink, one or more substrates coupled together, one or more pressfit pins coupled to the one or more substrates, and two or more guide pins coupled to the one or more substrates, where the two or more guide pins may have a height greater than the one or more pressfit pins.
    Type: Application
    Filed: June 5, 2023
    Publication date: October 5, 2023
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Chee Hiong CHEW, Yushuang YAO, Atapol PRAJUCKAMOL, Chuncao NIU
  • Semiconductor package with guide pin
    Patent number: 11710687
    Abstract: A semiconductor guide pin is disclosed. Specific implementations may include a heatsink, one or more substrates coupled together, one or more pressfit pins coupled to the one or more substrates, and two or more guide pins coupled to the one or more substrates, where the two or more guide pins may have a height greater than the one or more pressfit pins.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: July 25, 2023
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Chee Hiong Chew, Yushuang Yao, Atapol Prajuckamol, Chuncao Niu
  • POWER MODULE
    Publication number: 20230027138
    Abstract: A method includes attaching a power electronic substrate to a bottom of a frame. The frame has a box-like rectangular shape with an open top and an open bottom. The method further includes disposing an external conductive terminal on the frame. The external conductive terminal has at least one terminal stub that extends on to the front surface of the power electronic substrate. The method further includes welding the at least one terminal stub to at least one circuit trace disposed on the front surface of the power electronic substrate.
    Type: Application
    Filed: June 20, 2022
    Publication date: January 26, 2023
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yushuang YAO, Chee Hiong CHEW, Vemmond Jeng Hung NG, Chuncao NIU, Sravan VANAPARTHY
  • SEMICONDUCTOR PACKAGE WITH GUIDE PIN
    Publication number: 20200373231
    Abstract: A semiconductor guide pin is disclosed. Specific implementations may include a heatsink, one or more substrates coupled together, one or more pressfit pins coupled to the one or more substrates, and two or more guide pins coupled to the one or more substrates, where the two or more guide pins may have a height greater than the one or more pressfit pins.
    Type: Application
    Filed: July 3, 2019
    Publication date: November 26, 2020
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Chee Hiong CHEW, Yushuang YAO, Atapol PRAJUCKAMOL, Chuncao NIU