Patents by Inventor Chun-Chi Chen

Chun-Chi Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11964358
    Abstract: A method includes placing a polisher head on platen, the polisher head including a set of first magnets, and controlling a set of second magnets to rotate the polisher head on the platen, wherein controlling the set of second magnets includes reversing the polarity of at least one second magnet of the set of second magnets to produce a magnetic force on at least one first magnet of the set of first magnets, wherein the set of second magnets are external to the polisher head.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shang-Yu Wang, Chun-Hao Kung, Ching-Hsiang Tsai, Kei-Wei Chen, Hui-Chi Huang
  • Patent number: 11960253
    Abstract: A system and a method for parameter optimization with adaptive search space and a user interface using the same are provided. The system includes a data acquisition unit, an adaptive adjustment unit and an optimization search unit. The data acquisition unit obtains a set of executed values of several operating parameters and a target parameter. The adaptive adjustment unit includes a parameter space transformer and a search range definer. The parameter space transformer performs a space transformation on a parameter space of the operating parameters according to the executed values. The search range definer defines a parameter search range in a transformed parameter space based on the sets of the executed values. The optimization search unit takes the parameter search range as a limiting condition and takes optimizing the target parameter as a target to search for a set of recommended values of the operating parameters.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: April 16, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Po-Yu Huang, Chun-Fang Chen, Hong-Chi Ku, Te-Ming Chen, Chien-Liang Lai, Sen-Chia Chang
  • Patent number: 11956553
    Abstract: An image sensor device has a first number of first pixels disposed in a substrate and a second number of second pixels disposed in the substrate. The first number is substantially equal to the second number. A light-blocking structure disposed over the first pixels and the second pixels. The light-blocking structure defines a plurality of first openings and second openings through which light can pass. The first openings are disposed over the first pixels. The second openings are disposed over the second pixels. The second openings are smaller than the first openings. A microcontroller is configured to turn on different ones of the second pixels at different points in time.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: April 9, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yun-Wei Cheng, Chun-Hao Chou, Kuo-Cheng Lee, Hsin-Chi Chen
  • Patent number: 11955515
    Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Chuan Chiu, Chia-Hao Chang, Cheng-Chi Chuang, Chih-Hao Wang, Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Yu-Ming Lin
  • Patent number: 11950016
    Abstract: The present invention provides a control method of a receiver. The control method includes the steps of: when the receiver enters a sleep/standby mode, continually detecting an auxiliary signal from an auxiliary channel to generate a detection result; and if the detection result indicates that the auxiliary signal has a preamble or a specific pattern, generating a wake-up control signal to wake up the receiver before successfully receiving the auxiliary signal having a wake-up command.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: April 2, 2024
    Assignee: MEDIATEK INC.
    Inventors: Chun-Chia Chen, Chih-Hung Pan, Chia-Chi Liu, Shun-Fang Liu, Meng-Kun Li, Chao-An Chen
  • Patent number: 11937932
    Abstract: An acute kidney injury predicting system and a method thereof are proposed. A processor reads the data to be tested, the detection data, the machine learning algorithm and the risk probability comparison table from a main memory. The processor trains the detection data according to the machine learning algorithm to generate an acute kidney injury prediction model, and inputs the data to be tested into the acute kidney injury prediction model to generate an acute kidney injury characteristic risk probability and a data sequence table. The data sequence table lists the data to be tested in sequence according to a proportion of each of the data to be tested in the acute kidney injury characteristics. The processor selects one of the medical treatment data from the risk probability comparison table according to the acute kidney injury characteristic risk probability.
    Type: Grant
    Filed: July 8, 2022
    Date of Patent: March 26, 2024
    Assignees: TAICHUNG VETERANS GENERAL HOSPITAL, TUNGHAI UNIVERSITY
    Inventors: Chieh-Liang Wu, Chun-Te Huang, Cheng-Hsu Chen, Tsai-Jung Wang, Kai-Chih Pai, Chun-Ming Lai, Min-Shian Wang, Ruey-Kai Sheu, Lun-Chi Chen, Yan-Nan Lin, Chien-Lun Liao, Ta-Chun Hung, Chien-Chung Huang, Chia-Tien Hsu, Shang-Feng Tsai
  • Patent number: 11939603
    Abstract: A modified cutinase is disclosed. The cutinase has the modified amino acid sequence of SEQ ID NO: 2, wherein the modification is a substitution of asparagine at position 181 with alanine, or substitutions of asparagine at position 181 with alanine and phenylalanine at position 235 with leucine. The modified enzyme has improved PET-hydrolytic activity, and thus, the high-activity PET hydrolase is obtained, and the industrial application value of the PET hydrolase is enhanced.
    Type: Grant
    Filed: June 21, 2023
    Date of Patent: March 26, 2024
    Assignee: HUBEI UNIVERSITY
    Inventors: Chun-Chi Chen, Jian-Wen Huang, Jian Min, Xian Li, Beilei Shi, Panpan Shen, Yu Yang, Yumei Hu, Longhai Dai, Lilan Zhang, Yunyun Yang, Rey-Ting Guo
  • Publication number: 20240096996
    Abstract: A semiconductor device includes a first dielectric layer, a stack of semiconductor layers disposed over the first dielectric layer, a gate structure wrapping around each of the semiconductor layers and extending lengthwise along a direction, and a dielectric fin structure and an isolation structure disposed on opposite sides of the stack of semiconductor layers and embedded in the gate structure. The dielectric fin structure has a first width along the direction smaller than a second width of the isolation structure along the direction. The isolation structure includes a second dielectric layer extending through the gate structure and the first dielectric layer, and a third dielectric layer extending through the first dielectric layer and disposed on a bottom surface of the gate structure and a sidewall of the first dielectric layer.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Lo-Heng Chang, Cheng-Chi Chuang, Kuan-Lun Cheng, Chih-Hao Wang
  • Patent number: 11936877
    Abstract: A video decoder can be configured to determine that a current block in a current picture of the video data is coded in an affine prediction mode; determine one or more control-point motion vectors (CPMVs) for the current block; identify an initial prediction block for the current block in a reference picture using the one or more CPMVs; determine a current template for the current block in the current picture; and determine an initial reference template for the initial prediction block in the reference picture; and perform a motion vector refinement process to determine a modified prediction block based on a comparison of the current template to the initial reference template.
    Type: Grant
    Filed: April 7, 2022
    Date of Patent: March 19, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Chun-Chi Chen, Han Huang, Zhi Zhang, Yao-Jen Chang, Yan Zhang, Vadim Seregin, Marta Karczewicz
  • Publication number: 20240084012
    Abstract: An isolated bispecific antibody or antigen-binding portion thereof includes a first chain which specifically binds to human PD-1(hPD-1) and blocks the interaction between hPD-1 and PD-L1, and a second chain which specifically binds to human CD47 and inhibits its interaction with SIRP-alpha, where the first chain and the second chain are coupled in a knob-in-hole format through their respective CH3 domain.
    Type: Application
    Filed: December 31, 2021
    Publication date: March 14, 2024
    Inventors: Chun-Jen LIN, Cheng-Chi CHAO, Chang-Hsin Chen, Gloria Guohong ZHANG, Guochen YAN
  • Publication number: 20240089492
    Abstract: An example device includes memory configured to store the video data and one or more processors implemented in circuitry and communicatively coupled to the memory. The one or more processors are configured to determine at least one of a temporal candidate or a history-based candidate and determine at least one non-adjacent candidate, wherein the at least one non-adjacent candidate is from a unit that is not adjacent to a current prediction unit (PU). The one or more processors are configured to determine an advanced motion vector predictor (AMVP) candidate list including the at least one of the temporal candidate or the history-based candidate and the at least one non-adjacent candidate. The at least one non-adjacent candidate is added to the AMVP candidate list after the temporal candidate or before the history-based candidate. The one or more processors are configured to code the current PU based on the AMVP candidate list.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Inventors: Yan Zhang, Zhi Zhang, Vadim Seregin, Marta Karczewicz, Chun-Chi Chen
  • Publication number: 20240087951
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first metal layer over a substrate, forming a dielectric layer over the first metal layer. The method includes forming a trench in the dielectric layer, and performing a surface treatment process on a sidewall surface of the trench to form a hydrophobic layer. The hydrophobic layer is formed on a sidewall surface of the dielectric layer. The method further includes depositing a metal material in the trench and over the hydrophobic layer to form a via structure.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Inventors: Chun-Hao Kung, Chih-Chieh Chang, Kao-Feng Liao, Hui-Chi Huang, Kei-Wei Chen
  • Publication number: 20240079493
    Abstract: A semiconductor device and method of manufacturing the same are provided. The semiconductor device includes a substrate and a gate structure disposed on the substrate. The semiconductor device also includes a source region and a drain region disposed within the substrate. The substrate includes a drift region laterally extending between the source region and the drain region. The semiconductor device further includes a first stressor layer disposed over the drift region of the substrate. The first stressor layer is configured to apply a first stress to the drift region of the substrate. In addition, the semiconductor device includes a second stressor layer disposed on the first stressor layer. The second stressor layer is configured to apply a second stress to the drift region of the substrate, and the first stress is opposite to the second stress.
    Type: Application
    Filed: September 1, 2022
    Publication date: March 7, 2024
    Inventors: GUAN-QI CHEN, CHEN CHI HSIAO, KUN-TSANG CHUANG, FANG YI LIAO, YU SHAN HUNG, CHUN-CHIA CHEN, YU-SHAN HUANG, TUNG-I LIN
  • Patent number: 11924410
    Abstract: An example device for decoding video data includes one or more processors implemented in circuitry and configured to: generate an inter-prediction block for a current block of video data; generate an intra-prediction block for the current block of video data; generate a final prediction block for the current block of video data from the inter-prediction block and the intra-prediction block, including performing each of combined inter/intra prediction (CIIP) mode, overlapped block motion compensation (OBMC), and luma mapping with chroma scaling (LMCS) while generating the final prediction block; and decode the current block of video data using the final prediction block. To generate the final prediction block, the processors may perform LMCS on a first inter-prediction sub-block, combine the LMCS-mapped first inter-prediction sub-block with the intra-prediction block using CIIP, and perform OBMC between the first CIIP prediction block and a second inter-prediction sub-block.
    Type: Grant
    Filed: May 5, 2022
    Date of Patent: March 5, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Han Huang, Yao-Jen Chang, Vadim Seregin, Chun-Chi Chen, Marta Karczewicz
  • Patent number: 11895321
    Abstract: An example device includes memory configured to store the video data and one or more processors implemented in circuitry and communicatively coupled to the memory. The one or more processors are configured to determine at least one of a temporal candidate or a history-based candidate and determine at least one non-adjacent candidate, wherein the at least one non-adjacent candidate is from a unit that is not adjacent to a current prediction unit (PU). The one or more processors are configured to determine an advanced motion vector predictor (AMVP) candidate list including the at least one of the temporal candidate or the history-based candidate and the at least one non-adjacent candidate. The at least one non-adjacent candidate is added to the AMVP candidate list after the temporal candidate or before the history-based candidate. The one or more processors are configured to code the current PU based on the AMVP candidate list.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: February 6, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Yan Zhang, Zhi Zhang, Vadim Seregin, Marta Karczewicz, Chun-Chi Chen
  • Patent number: 11895302
    Abstract: Systems and techniques are provided for processing video data. For example, the systems and techniques can include obtaining a current picture of video data and obtaining reference pictures for the current picture from the video data. A merge mode candidate can be determined for the current picture. First and second motion vectors can be identified for the merge mode candidate. A motion vector search strategy can be selected for the merge mode candidate from a plurality of motion vector search strategies. The selected motion vector search strategy can be associated with one or more constraints corresponding to at least one of the first motion vector or the second motion vector. The selected motion vector search strategy can be used to determine refined motion vectors based on the first motion vector, the second motion vector, and the reference pictures. The merge mode candidate can be processed using the refined motion vectors.
    Type: Grant
    Filed: June 23, 2022
    Date of Patent: February 6, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Han Huang, Vadim Seregin, Wei-Jung Chien, Zhi Zhang, Chun-Chi Chen, Marta Karczewicz
  • Publication number: 20240015333
    Abstract: A device for decoding video data comprises one or more processors configured to: obtain a syntax element from a bitstream that includes an encoded representation of the video data; determine, based on the syntax element, that a template-matching tool is enabled; based on the template-matching tool being enabled, applying the template-matching tool to generate a prediction block for a current coding unit (CU) of the video data; and reconstruct the current CU based on the prediction block for the current CU.
    Type: Application
    Filed: June 21, 2023
    Publication date: January 11, 2024
    Inventors: Chun-Chi Chen, Han Huang, Vadim Seregin, Marta Karczewicz
  • Publication number: 20230370605
    Abstract: An example device for decoding video data includes one or more processors configured to determine merge mode information for a current block, the merge mode information indicating that motion information for a current block is to be predicted using a first predictor motion vector and a second predictor motion vector; determine a first motion vector difference (MVD) for the first predictor motion vector and a second MVD for the second predictor motion vector, the second MVD being different than the first MVD; form a first motion vector equaling a combination of the first motion vector predictor and the first MVD; form a second motion vector equaling a combination of the second motion vector predictor and the second MVD; generate a prediction block using the first motion vector and the second motion vector; and decode the current block using the prediction block.
    Type: Application
    Filed: April 24, 2023
    Publication date: November 16, 2023
    Inventors: Chun-Chi Chen, Han Huang, Vadim Seregin, Marta Karczewicz
  • Publication number: 20230362391
    Abstract: A video decoder may be configured to determine a motion vector and a motion vector precision for a current block; identify a current block template within the current picture; search within a search area for a final reference block template that corresponds to the current block template, wherein to search within the search area, the one or more processors are further configured to: identify an initial reference block template based on the motion vector, search other reference block templates around the initial reference block template using a step size that is set to an initial step size, and iteratively reduce the step size from the initial step size until the step size is set to a final step size that equals the motion vector precision; determine a prediction block for the current block based on the final reference block template.
    Type: Application
    Filed: July 21, 2023
    Publication date: November 9, 2023
    Inventors: Chun-Chi Chen, Han Huang, Zhi Zhang, Vadim Seregin, Marta Karczewicz
  • Patent number: 11792423
    Abstract: A video coder is configured to determine bi-directional motion vectors of a current block of the video data and determine that a condition is satisfied with respect to the current block based on each component of the bi-directional motion vectors of the current block being less than a threshold value. The video coder is further configured to, based on the condition being satisfied with respect to the current block, early terminate application of a motion vector refinement process to the bi-directional motion vectors of the current block. The video coder is further configured to determine a prediction block for the current block based on the bi-directional motion vectors of the current block and reconstruct the current block based on the prediction block for the current block.
    Type: Grant
    Filed: November 19, 2020
    Date of Patent: October 17, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Chun-Chi Chen, Han Huang, Wei-Jung Chien, Marta Karczewicz