Patents by Inventor Chun-Chih Lin

Chun-Chih Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250095917
    Abstract: An inductive component and a method for fabricating the same are provided. The method includes: filling a mold with a first magnetic powder to form a base layer; forming a cavity in the base layer; inserting a coil corresponding to the cavity; filling the mold with a second magnetic powder to form a cover layer, in which the cover layer fills a space between the cavity and the corresponding coil and covers the base layer and the coil; executing a compression molding process to form a to-be-sliced package and taking the to-be-sliced package out; slicing the to-be-sliced package to obtain a to-be-packaged body; and forming a protective layer and an electrode part electrically connected to the coil on a surface of the to-be-packaged body.
    Type: Application
    Filed: September 16, 2024
    Publication date: March 20, 2025
    Inventors: CHUN-CHIH LIN, HSIN HSIEN YEH
  • Patent number: 12230517
    Abstract: An exhaust structure includes a piping section, wherein the piping section has a first inner diameter in a central region of the piping section, the piping section has a second diameter in at least one of an inlet or an outlet, and the second diameter has a same value as the first inner diameter. The exhaust structure further includes a plurality of smoothing layers configured to resist turbulence and condensation produced by a flow of one or more gasses in the piping section.
    Type: Grant
    Filed: May 26, 2022
    Date of Patent: February 18, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsien-Chang Hsieh, Chun-Chih Lin, Tah-te Shih, Wen-Hsong Wu, Chune-Te Yang, Yu-Jen Su
  • Publication number: 20250006424
    Abstract: A method for producing a magnetic device is provided. The magnetic device produced by the method includes a main body that is integrally formed. The method includes a preparing process, a coil assembling process, a placing process, and a forming process. The preparing process is implemented by producing a bottom seat and a lid. The coil assembling process is implemented by fixing a coiling to the bottom seat for formation of a first semi-finished product. The placing process is implemented by placing the first semi-finished product into a mold and placing the lid onto the first semi-finished product for formation of a second semi-finished product. The forming process is implemented by pressurizing the second semi-finished product, such that the bottom seat and the lid are melted and connected to each other to form the main body. The coil is correspondingly encompassed by the main body.
    Type: Application
    Filed: May 17, 2024
    Publication date: January 2, 2025
    Inventors: CHUN-CHIH LIN, SHOU-YI TSAO
  • Patent number: 12142664
    Abstract: A polysilicon layer is formed over a substrate. The polysilicon layer is etched to form a dummy gate electrode having a top portion with a first lateral dimension and a bottom portion with a second lateral dimension. The first lateral dimension is greater than, or equal to, the second lateral dimension. The dummy gate electrode is replaced with a metal gate electrode.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: November 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih Wei Bih, Han-Wen Liao, Xuan-You Yan, Yen-Yu Chen, Chun-Chih Lin
  • Publication number: 20240359194
    Abstract: A system for dispensing a liquid includes a conduit, the conduit being configured to convey the liquid; a dispensing tip fluidically coupled to the conduit; and a movable arm, the movable arm being configured to change a position of the dispensing tip relative to a workpiece to which the liquid is dispensed. The dispensing tip includes a first section having a liquid-containing wall and a septum, the septum divides the first section into at least a first liquid passage and a second liquid passage, and the septum is disposed to contact the liquid in each of the at least first liquid passage and second liquid passage during dispensing of the liquid to the workpiece.
    Type: Application
    Filed: July 10, 2024
    Publication date: October 31, 2024
    Inventors: Channing CHAN, Kuo-Shu TSENG, Chun-Chih LIN
  • Publication number: 20240342745
    Abstract: A method of preventing drippage in a liquid dispensing system includes generating at least a first proxy signal representing at least a first indirect measure of a position of a first automatic control valve (ACV), wherein the first ACV has positions ranging from fully closed to fully open. The method further includes recognizing, based on at least the first proxy signal, whether a failure state exists in which the first ACV has failed to close. The method further includes causing a second ACV to close when the failure state exists, wherein the second ACV is fluidically connected to the first ACV, and the second ACV has positions ranging from fully closed to fully open.
    Type: Application
    Filed: June 27, 2024
    Publication date: October 17, 2024
    Inventors: Chien-Hung WANG, Chun-Chih LIN, Chi-Hung LIAO, Yung-Yao LEE, Wei Chang CHENG
  • Patent number: 12094648
    Abstract: A magnetic device and a method for producing the same are provided. The magnetic device produced by the method includes a main body that is integrally formed. The method includes a preparing process, a coil assembling process, a placing process, and a forming process. The preparing process is implemented by producing a bottom seat and a lid. The coil assembling process is implemented by fixing a coiling to the bottom seat for formation of a first semi-finished product. The placing process is implemented by placing the first semi-finished product into a mold and placing the lid onto the first semi-finished product for formation of a second semi-finished product. The forming process is implemented by pressurizing the second semi-finished product, such that the bottom seat and the lid are melted and connected to each other to form the main body. The coil is correspondingly encompassed by the main body.
    Type: Grant
    Filed: October 25, 2023
    Date of Patent: September 17, 2024
    Assignee: CHILISIN ELECTRONICS CORP.
    Inventors: Chun-Chih Lin, Shou-Yi Tsao
  • Patent number: 12059692
    Abstract: A nozzle assembly for use in liquid-dispensing system, the nozzle assembly includes a pipe having lumens; a body, an end of the pipe being mounted to the body; the pipe having a wall and a septum, the wall enclosing a space, the septum dividing the space enclosed by the wall into the lumens; each of the lumens being correspondingly terminated in an orifice such that a liquid is escapable from each lumen through the corresponding orifice and is thereby dispensable from the nozzle assembly.
    Type: Grant
    Filed: April 27, 2023
    Date of Patent: August 13, 2024
    Assignee: TAIWAN SEMICONDUCOTR MANUFACTURING COMPANY, LTD.
    Inventors: Channing Chan, Kuo-Shu Tseng, Chun-Chih Lin
  • Patent number: 12048944
    Abstract: A method of preventing drippage in a fluid dispensing system. The fluid dispensing system includes a first automatic control valve (ACV), an input of the first ACV connected to fluid-source of fluid, the first ACV having positions ranging from fully closed to fully open, and a second ACV, an input of the second ACV being connected to an output of the first ACV, and an output of the second ACV being connected to a nozzle, the second ACV having positions ranging from fully closed to fully open. The method includes generating a first proxy signal representing at least a first indirect measure of a position of the first ACV. The method includes recognizing, based on at least the first proxy signal that a failure state exists in which the first ACV has failed to close. The method includes causing the second ACV to close when the failure state exists.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: July 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien-Hung Wang, Chun-Chih Lin, Chi-Hung Liao, Yung-Yao Lee, Wei Chang Cheng
  • Patent number: 12040293
    Abstract: The present disclosure provides an integrated circuit (IC) structure. The IC structure includes a semiconductor substrate; an interconnection structure formed on the semiconductor substrate; and a redistribution layer (RDL) metallic feature formed on the interconnection structure. The RDL metallic feature further includes a barrier layer disposed on the interconnection structure; a diffusion layer disposed on the barrier layer, wherein the diffusion layer includes metal and oxygen; and a metallic layer disposed on the diffusion layer.
    Type: Grant
    Filed: November 14, 2022
    Date of Patent: July 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih Wei Bih, Sheng-Wei Yeh, Yen-Yu Chen, Wen-Hao Cheng, Chih-Wei Lin, Chun-Chih Lin
  • Publication number: 20240145561
    Abstract: A semiconductor may include an active region, an epitaxial source/drain formed in and extending above the active region, and a first dielectric layer formed over a portion of the active region. The semiconductor may include a first metal gate and a second metal gate formed in the first dielectric layer, a second dielectric layer formed over the first dielectric layer and the second metal gate, and a titanium layer, without an intervening fluorine residual layer, formed on the metal gate and the epitaxial source/drain. The semiconductor may include a first metal layer formed on top of the titanium on the first metal gate, a second metal layer formed on top of the titanium layer on the epitaxial source/drain, and a third dielectric layer formed on the second dielectric layer. The semiconductor may include first and second vias formed in the third dielectric layer.
    Type: Application
    Filed: January 10, 2024
    Publication date: May 2, 2024
    Inventors: Yu-Ting TSAI, Chung-Liang CHENG, Hong-Ming LO, Chun-Chih LIN, Chyi-Tsong NI
  • Patent number: 11908909
    Abstract: A semiconductor may include an active region, an epitaxial source/drain formed in and extending above the active region, and a first dielectric layer formed over a portion of the active region. The semiconductor may include a first metal gate and a second metal gate formed in the first dielectric layer, a second dielectric layer formed over the first dielectric layer and the second metal gate, and a titanium layer, without an intervening fluorine residual layer, formed on the metal gate and the epitaxial source/drain. The semiconductor may include a first metal layer formed on top of the titanium on the first metal gate, a second metal layer formed on top of the titanium layer on the epitaxial source/drain, and a third dielectric layer formed on the second dielectric layer. The semiconductor may include first and second vias formed in the third dielectric layer.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: February 20, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Ting Tsai, Chung-Liang Cheng, Hong-Ming Lo, Chun-Chih Lin, Chyi-Tsong Ni
  • Patent number: 11823919
    Abstract: A multi-shield plate includes a plurality of windows and a plurality of vapor shields mounted to the plurality of windows, wherein each window of the plurality of windows is formed in the plate and extends through an entirety of the plate in a thickness direction. The multi-shield plate further includes a plurality of apertures in the plate, wherein each of the plurality of apertures extends through the entirety of the plate in the thickness direction and, an aperture of the plurality of apertures is aligned with a corresponding window of the plurality of windows along radius of the multi-shield plate.
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: November 21, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ping-Tse Lin, Wen-Cheng Lien, Chun-Chih Lin, Monica Ho
  • Patent number: 11741149
    Abstract: A storage server management system includes a management database for storing rack data and storage server data, wherein the rack data includes rack identifications and coordinates of multiple storage servers and the storage server data includes media access control addresses, model name and rail identifications of the multiple storage servers, multiple racks for containing the multiple storage servers, a dynamic host configuration protocol server for configuring the internet protocol addresses to the multiple storage servers, and a management console for generating a rack location map according to the rack data and the storage server data.
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: August 29, 2023
    Assignee: Wistron Corporation
    Inventor: Chun-Chih Lin
  • Publication number: 20230264208
    Abstract: A nozzle assembly for use in liquid-dispensing system, the nozzle assembly includes a pipe having lumens; a body, an end of the pipe being mounted to the body; the pipe having a wall and a septum, the wall enclosing a space, the septum dividing the space enclosed by the wall into the lumens; each of the lumens being correspondingly terminated in an orifice such that a liquid is escapable from each lumen through the corresponding orifice and is thereby dispensable from the nozzle assembly.
    Type: Application
    Filed: April 27, 2023
    Publication date: August 24, 2023
    Inventors: Channing CHAN, Kuo-Shu TSENG, Chun-Chih LIN
  • Patent number: 11642682
    Abstract: A nozzle assembly for use in liquid-dispensing system, the nozzle assembly including: a body configured to receive a pipe; and the pipe, an end of the pipe being mounted on the body. The pipe includes multiple lumens correspondingly terminated in multiple orifices such that a liquid is escapable from each lumen through the corresponding orifice and is thereby dispensable from the nozzle assembly. The pipe has a first flow-capacity to supply a first volume of the liquid at a first flow-rate and at a first pressure. Each orifice and corresponding lumen has a second flow-capacity to supply a second volume of the liquid at a second flow-rate and at a second pressure.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: May 9, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Channing Chan, Kuo-Shu Tseng, Chun-Chih Lin
  • Publication number: 20230072507
    Abstract: The present disclosure provides an integrated circuit (IC) structure. The IC structure includes a semiconductor substrate; an interconnection structure formed on the semiconductor substrate; and a redistribution layer (RDL) metallic feature formed on the interconnection structure. The RDL metallic feature further includes a barrier layer disposed on the interconnection structure; a diffusion layer disposed on the barrier layer, wherein the diffusion layer includes metal and oxygen; and a metallic layer disposed on the diffusion layer.
    Type: Application
    Filed: November 14, 2022
    Publication date: March 9, 2023
    Inventors: Shih Wei Bih, Sheng-Wei Yeh, Yen-Yu Chen, Wen-Hao Cheng, Chih-Wei Lin, Chun-Chih Lin
  • Publication number: 20230013102
    Abstract: Methods of forming a semiconductor device structure are described. The method includes forming a first conductive feature including a conductive fill material over a substrate, forming an etch stop layer on the conductive fill material, forming an intermetallization dielectric on the etch stop layer, forming an opening in the etch stop layer and the intermetallization dielectric to expose a portion of the conductive fill material, forming a recess in the exposed portion of the conductive fill material, and the opening and the recess together form a rivet-shaped space. The method further includes forming a second conductive feature in the rivet-shaped space and forming a metal nitride layer over the intermetallization dielectric and the second conductive feature. The forming the metal nitride layer includes depositing the metal nitride layer and treating the metal nitride layer with a plasma treatment process.
    Type: Application
    Filed: May 3, 2022
    Publication date: January 19, 2023
    Inventors: Hung-Chih WANG, Hsin-Jung CHANG, Chun-Chih LIN, Su-Yu YEH
  • Publication number: 20220384592
    Abstract: A semiconductor may include an active region, an epitaxial source/drain formed in and extending above the active region, and a first dielectric layer formed over a portion of the active region. The semiconductor may include a first metal gate and a second metal gate formed in the first dielectric layer, a second dielectric layer formed over the first dielectric layer and the second metal gate, and a titanium layer, without an intervening fluorine residual layer, formed on the metal gate and the epitaxial source/drain. The semiconductor may include a first metal layer formed on top of the titanium on the first metal gate, a second metal layer formed on top of the titanium layer on the epitaxial source/drain, and a third dielectric layer formed on the second dielectric layer. The semiconductor may include first and second vias formed in the third dielectric layer.
    Type: Application
    Filed: July 29, 2022
    Publication date: December 1, 2022
    Inventors: Yu-Ting TSAI, Chung-Liang CHENG, Hong-Ming LO, Chun-Chih LIN, Chyi-Tsong NI
  • Patent number: 11502050
    Abstract: The present disclosure provides an integrated circuit (IC) structure. The IC structure includes a semiconductor substrate; an interconnection structure formed on the semiconductor substrate; and a redistribution layer (RDL) metallic feature formed on the interconnection structure. The RDL metallic feature further includes a barrier layer disposed on the interconnection structure; a diffusion layer disposed on the barrier layer, wherein the diffusion layer includes metal and oxygen; and a metallic layer disposed on the diffusion layer.
    Type: Grant
    Filed: February 8, 2021
    Date of Patent: November 15, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih Wei Bih, Sheng-Wei Yeh, Yen-Yu Chen, Wen-Hao Cheng, Chih-Wei Lin, Chun-Chih Lin