Abstract: A display panel has sub-pixel regions. The display panel includes an optical device layer, an adhesive layer and a light adjustment layer. The optical device layer includes a buffer layer and light-emitting units, a light-emitting unit is located in an opening region of a corresponding sub-pixel region, and the buffer layer is located on a light-exit surface of the light-emitting units. The adhesive layer is located on a side of the buffer layer away from the light-emitting units, a refractive index n2 of the adhesive layer being less than a refractive index n1 of the buffer layer. The light adjustment layer is located on the side of the buffer layer, and is configured such that when light emitted by the light-emitting units enters into the buffer layer, at least part of light with a refraction angle greater than or equal to arc ? sin ? n ? 2 n ? 1 enters the adhesive layer through the light adjustment layer.

Abstract: A driving base plate includes a functional region (A) and a peripheral region (B) surrounding the functional region (A). Both the functional region (A) and the peripheral region (B) include a supporting substrate, and the functional region (A) further includes a flexible substrate and at least one protecting layer that are sequentially arranged on the supporting substrate. The region of the orthographic projection of the flexible substrate on the supporting substrate is located within the region where the supporting substrate within the functional region (A) is located, and the protecting layer covers the surface of the flexible substrate further from the supporting substrate and the side of the flexible substrate close to the peripheral region (B). The adhesive force between the flexible substrate and the supporting substrate of the driving base plate is increased, and the reliability of the products manufactured by using the driving base plate is improved.

Abstract: An optical sensor and a display apparatus. The optical sensor includes: a base substrate (1); a detection circuit (2) on the base substrate (1); a plurality of photosensitive devices (3) on a side of the detection circuit (2) facing away from the base substrate (1); a plurality of light converged elements (4) on a side of the photosensitive devices (3) facing away from the base substrate (1); where an orthographic projection of one light converged element (4) on the base substrate (1) covers orthographic projections of at least two photosensitive devices (3) on the base substrate (1); and a light constrained structure (5) between the photosensitive devices (3) and the light converged elements (4).

Abstract: A pixel driving circuit includes a data writing circuit, a light-emitting control circuit, a switching circuit and a light-emitting diode chip. The data writing circuit is electrically connected to a first scanning signal terminal, a data signal terminal and a first node. The light-emitting control circuit is configured to transmit a first voltage signal received at the first voltage signal terminal to a second node. The switching circuit includes switching transistors. The light-emitting diode chip is electrically connected to the second node. The light-emitting diode chip includes light-emitting portions. The light-emitting diode chip is configured to drive the light-emitting portions to emit light in different periods of time respectively or drive at least two light-emitting portions to emit light in a same period of time. At least part of the light-emitting portions are sequentially connected in series through at least one switching transistor.

Abstract: A display panel and a display device are provided. The display panel includes a plurality of display units, each display unit includes a transparent area, and the display panel further includes a base substrate and a composite functional layer. The composite functional layer is provided on a side of the base substrate and has a first through-hole formed therein, and the first through-hole is provided in the transparent area. The composite functional layer includes a composite transparent layer and a light-shielding layer. The composite transparent layer includes a plurality of transparent functional layers, and includes a light-transmitting part surrounding the first through-hole. An orthographic projection of the light-shielding layer on the base substrate covers an orthographic projection of at least a portion of the light-transmitting part on the base substrate.

Abstract: A pixel circuit includes a light emitting element, a first driving circuit, a second driving circuit, a first control circuit, a setting circuit, a first energy storage circuit, a second control circuit and a control data voltage writing-in circuit. The first control circuit controls to connect or disconnect the control end of the first driving circuit and the control end of the second driving circuit under the control of the potential of the first node. The second control circuit provides the second setting voltage to the control end of the first driving circuit, and connects or disconnects the control end of the first driving circuit and the connection node under the control of the control signal provided by the charging control end; the control data voltage writing-in circuit writes the control data voltage into the first node under the control of the first writing-in control signal.

Abstract: The embodiment of the present disclosure provides a display panel, which includes an array substrate, a counter substrate and a spacer. The array substrate includes a base substrate and a plurality of signal lines on the base substrate. The plurality of signal lines include a plurality of first signal lines and a plurality of second signal lines. The plurality of first signal lines and the plurality of second signal lines intersect each other to define a plurality of first regions. The plurality of first regions include a plurality of first pixel regions, at least one second pixel region and at least one redundant region. The first signal line extends along a first direction, the second signal line includes a body portion extending along a second direction, at least one second signal line further includes a bending portion connected to the body portion.

Abstract: A light emitting substrate is provided. The light emitting substrate includes a plurality of subpixels. A respective subpixel of the plurality of subpixels includes n1 number of main light emitting elements; n1 number of main pixel driving circuits configured to drive light emission in the n1 number of main light emitting elements; n2 number of auxiliary light emitting elements; n2 number of auxiliary pixel driving circuits configured to drive light emission in the n2 number of auxiliary light emitting elements; n1?1, and n2?1. A respective main pixel driving circuit of the n1 number of main pixel driving circuits includes a first driving transistor. A respective auxiliary pixel driving circuit of the n2 number of auxiliary pixel driving circuits includes a second driving transistor.

Abstract: Provided is a shift register unit. The shift register unit includes: a first input circuit, connected to a first control terminal, a turn-on signal terminal, a first node and a second node; a second input circuit, connected to a first power supply terminal, the first node and a third node; an output control circuit, connected to the first node, the second node, the third node, a second control terminal and a fourth node; and an output circuit, connected to the second node, the fourth node, the first power supply terminal, a second power supply terminal, a first output terminal and a second output terminal.

Abstract: A scan circuit is provided. The scan circuit includes a plurality of scan units in a plurality of stages, respectively. A respective scan unit of the plurality of scan units includes an output subcircuit. The output subcircuit includes a first switch transistor and a second switch transistor. A source electrode of the first switch transistor is coupled to a third terminal configured to receive a first clock signal. A drain electrode of the first switch transistor is coupled to a first output terminal configured to output a first control signal. A source electrode of the second switch transistor is coupled to a fourth terminal configured to receive the third clock signal. A drain electrode of the second switch transistor is coupled to a second output terminal configured to output a second control signal. Gate electrodes of the first switch transistor and the second switch transistor are coupled to a first node.

Abstract: A display panel, a method for driving a display panel, and a display apparatus are provided. The display panel includes a first base substrate and a plurality of pixels on one side of the first base substrate. Each pixel includes: a plurality of pixel sub-electrodes independent from each other and configured to form an electric field with an included angle greater than 0 with respect to a direction perpendicular to the first base substrate under control of incompletely same driving signals; a common electrode on a side of the pixel electrode away from the first base substrate; and an electrophoretic liquid layer between the pixel electrode and the common electrode, including a plurality of charged particles therein.

Abstract: A display method is provided. The display method includes providing a display panel having a plurality of subpixels, a respective subpixel of the plurality of subpixels including a first area, n1 number of second areas, and n2 number of third areas, the first area being between the n1 number of second areas and the n2 number of third areas, n1?1, and n2?1; for displaying a first frame of image, controlling light emission of the respective subpixel to be limited in the first area, m1 number of the n1 number of second areas, and m2 number of the n2 number of third areas; and for displaying a second frame of image, controlling light emission of the respective subpixel to be limited in the first area, ml? number of the n1 number of second areas, and m2? number of the n2 number of third areas.

Abstract: A pixel driving circuit includes a data writing circuit, a light-emitting control circuit and a light-emitting diode chip. The data writing circuit is electrically connected to a first scanning signal terminal, a data signal terminal and a first node. The light-emitting control circuit is electrically connected to the first node, an enable signal terminal, a first voltage signal terminal and a second node, and is configured to transmit a first voltage signal received at the first voltage signal terminal to the second node. The light-emitting diode chip is electrically connected to the second node and a second voltage signal terminal. The light-emitting diode chip includes a plurality of light-emitting portions. The light-emitting diode chip is configured to drive the plurality of light-emitting portions to emit light in different periods of time respectively or drive at least two light-emitting portions to emit light in a same period of time.

Abstract: A light-emitting device includes a first semiconductor layer, a light-emitting functional layer and a second semiconductor layer that are stacked. The first semiconductor layer includes a first semiconductor pattern and a second semiconductor pattern. The light-emitting functional layer includes a first light-emitting pattern and a second light-emitting pattern spaced apart. The second semiconductor layer includes a third semiconductor pattern and a fourth semiconductor pattern spaced apart. Orthographic projections of the first semiconductor pattern, the first light-emitting pattern and the third semiconductor pattern on a reference plane at least partially overlap to form a first light-emitting portion. Orthographic projections of the second semiconductor pattern, the second light-emitting pattern and the fourth semiconductor pattern on the reference plane at least partially overlap to form a second light-emitting portion.

Abstract: The present disclosure provides a gate driving circuit, a method of driving a gate driving circuit, and a display panel. The gate driving circuit includes a plurality of driving units connected in cascade. Each driving unit includes: N shift register units; and a mode control circuit connected to the N shift register units, wherein the mode control circuit is configured to receive a control signal for the driving unit, and connect the N shift register units in one of a plurality of resolution modes under the control of the control signal.

Abstract: The present disclosure provides a gate driving circuit, a method of driving a gate driving circuit, and a display panel. The gate driving circuit includes a plurality of driving units connected in cascade. Each driving unit includes: N shift register units; and a mode control circuit connected to the N shift register units, wherein the mode control circuit is configured to receive a control signal for the driving unit, and connect the N shift register units in one of a plurality of resolution modes under the control of the control signal.

Abstract: A pixel driving circuit includes a data writing circuit, a light-emitting control circuit and a light-emitting diode chip. The data writing circuit is electrically connected to a first scanning signal terminal, a data signal terminal and a first node. The light-emitting control circuit is electrically connected to the first node, an enable signal terminal, a first voltage signal terminal and a second node, and is configured to transmit a first voltage signal received at the first voltage signal terminal to the second node. The light-emitting diode chip is electrically connected to the second node and a second voltage signal terminal. The light-emitting diode chip includes a plurality of light-emitting portions. The light-emitting diode chip is configured to drive the plurality of light-emitting portions to emit light in different periods of time respectively or drive at least two light-emitting portions to emit light in a same period of time.

Abstract: The present application discloses a Bacillus sp. producing a bioflocculant and a biosurfactant. The microbial classification of the Bacillus sp. is named Bacillus sp. SS15, which has been preserved in China Center for Type Culture Collection on Mar. 29, 2021, and its preservation number is CCTCC M2021295; the 16S rRNA sequence of SS15 is shown as SEQ ID NO.1. Bacillus sp. SS15 obtained by the present application has the function of simultaneously producing a bioflocculant and a biosurfactant. The bioflocculant and biosurfactant produced by Bacillus sp. SS15 of the present application not only have high activity, but also show strong tolerance in the ranges of pH (2-12), temperature (4° C.-100° C.) and salinity (0-100 g/L). Meanwhile, they can be applied to the remediation of a fracturing flowback liquid and can effectively promote the removal of chroma, suspended solids, COD, n-alkanes and polycyclic aromatic hydrocarbons at the same time.

Abstract: The present disclosure provides a gate driving circuit, a method of driving a gate driving circuit, and a display panel. The gate driving circuit includes a plurality of driving units connected in cascade. Each driving unit includes: N shift register units; and a mode control circuit connected to the N shift register units, wherein the mode control circuit is configured to receive a control signal for the driving unit, and connect the N shift register units in one of a plurality of resolution modes under the control of the control signal.

Abstract: Provided are a display panel, a drive method thereof and a display apparatus. The display panel includes a plurality of scan signal lines, a plurality of data signal lines and a plurality of sub-pixels; at least one sub-pixel includes switch assembly and a display unit, wherein the switch assembly at least includes a control terminal, an input terminal and an output terminal, wherein the input terminal is connected to the data signal line, the output terminal is connected to the display unit, and the control terminal or the input terminal is connected to the scan signal line; the display panel further includes at least one switch control line, which is connected to the control terminal of the switch assembly, and the switch control line is configured to control the input terminal and the output terminal of the switch assembly to be turned on or off.