Patents by Inventor Chung-An Chien

Chung-An Chien has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11966107
    Abstract: An anti-peep display device includes a display module and an anti-peep module disposed on the display module. The anti-peep module includes the following features. The first light incident surface faces the display surface, the second and third light incident surfaces are located on opposite sides of the first light incident surface, the first condensing portion is disposed corresponding to the second light incident surface and the first light source, the second condensing portion is disposed corresponding to the third light incident surface and the second light source, the first and second condensing portions convert beams of the first and second light sources into anti-peep beams with a beam angle less than 10 degrees, and the optical microstructures reflect the anti-peep beams and exit the anti-peep beams from the light guide plate. The present invention also provides an anti-peep method applicable to the anti-peep display device.
    Type: Grant
    Filed: June 14, 2023
    Date of Patent: April 23, 2024
    Assignee: CHAMP VISION DISPLAY INC.
    Inventors: Chung-Hao Wu, Hsin-Hung Lee, Chin-Ku Liu, Chun-Chien Liao, Wei-Jhe Chien
  • Publication number: 20240113234
    Abstract: An integrated chip including a gate layer. An insulator layer is over the gate layer. A channel structure is over the insulator layer. A pair of source/drains are over the channel structure and laterally spaced apart by a dielectric layer. The channel structure includes a first channel layer between the insulator layer and the pair of source/drains, a second channel layer between the insulator layer and the dielectric layer, and a third channel layer between the second channel layer and the dielectric layer. The first channel layer, the second channel layer, and the third channel layer include different semiconductors.
    Type: Application
    Filed: January 4, 2023
    Publication date: April 4, 2024
    Inventors: Ya-Yun Cheng, Wen-Ling Lu, Yu-Chien Chiu, Chung-Wei Wu, Zhiqiang Wu
  • Patent number: 11948702
    Abstract: A radiation source apparatus includes a vessel, a laser source, a collector, a horizontal obscuration bar, and a reflective mirror. The vessel has an exit aperture. The laser source is configured to emit a laser beam to excite a target material to form a plasma. The collector is disposed in the vessel and configured to collect a radiation emitted by the plasma and to reflect the collected radiation to the exit aperture of the vessel. The horizontal obscuration bar extends from a sidewall of the vessel at least to a position between the laser source and the exit aperture of the vessel. The reflective mirror is in the vessel and connected to the horizontal obscuration bar.
    Type: Grant
    Filed: May 5, 2023
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Chung Tu, Sheng-Kang Yu, Shang-Chieh Chien, Li-Jui Chen, Heng-Hsin Liu
  • Publication number: 20240040715
    Abstract: In one or more embodiments, an information handling system may include multiple fans, a chassis configured to house components of the information handling system, and at least one mat fastened to the chassis, among others. For example, the chassis may include multiple holes through the chassis. For instance, the at least one mat may cover the multiple holes. In one or more embodiments, the at least one mat and the multiple holes may be configured to reduce acoustic energy within the chassis produced by the multiple fans.
    Type: Application
    Filed: July 26, 2022
    Publication date: February 1, 2024
    Inventors: CHIH-CHIA HUANG, WAN-NIEN CHEN, HUNG-CHIH CHUANG, CHUNG-CHIEN WU
  • Patent number: 11812575
    Abstract: A server system comprises a deck, a front panel arranged on the deck and defining a collecting space; two doors arranged on opposite sides of the deck, and being perpendicular to the front panel; two receiving frame structures arranged between the doors in a back to back arrangement, and configured to receive multiple rows and columns of a plurality of storage drives horizontally, wherein two periphery corridors are each defined between one of the doors and one of the receiving frame structure facing the one door; two circuit boards arranged between the two receiving frame structures, wherein the two circuit boards comprise a plurality of slits, wherein a central corridor is defined between the two circuit boards; a storage cover disposed above the deck over the two periphery corridors, the central corridor, the two receiving frame structures, and the two circuit boards.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: November 7, 2023
    Assignee: CHENBRO MICOM CO., LTD.
    Inventors: Chien-Wen Wang, Han-Chung Chien, Sheng-Chan Lin, Hao-Hsiang Hsu, Chiung-Wei Lin, An-Hsin Chen
  • Patent number: 11812578
    Abstract: An enclosure for receiving a plurality of storage components is provided. The enclosure includes a deck, a top cover, a front panel, a stress distributing member, and a pair of component housings. The front panel is disposed between the deck and the top cover disposed over the deck. The stress distributing member traverses an entire width of the deck and is fastened to the deck and the top cover. A front section is defined between the front panel and the stress distributing member. The component housings are arranged in the front section. Each of the component housings has a front end facing outward the enclosure and a back end facing inward the enclosure. Each of the component housings is configured to receive at least a set of one or more of the storage components, and ends of the stress distributing member extend beyond the front ends of the component housings.
    Type: Grant
    Filed: November 18, 2022
    Date of Patent: November 7, 2023
    Assignee: CHENBRO MICOM CO., LTD.
    Inventors: Chien-Wen Wang, Han-Chung Chien, Sheng-Chan Lin, Hao-Hsiang Hsu, Chiung-Wei Lin, An-Hsin Chen
  • Publication number: 20230307317
    Abstract: A heat dissipation device includes a main fixed base plate, a main heat pipe set, a lower heat dissipation fin set and an upper heat dissipation module. The main heat pipe set is fixed on the main fixed base plate, and the lower heat dissipation fin set is also fixed on the main fixed base plate, and the main heat pipe set passes through the lower heat dissipation fin set, and is exposed on the lower heat dissipation fin set. In addition, the upper heat dissipation module is detachably installed on the lower heat dissipation fin set and contacts the main heat pipe set.
    Type: Application
    Filed: March 20, 2023
    Publication date: September 28, 2023
    Inventors: Cheng-Ju CHANG, Wan-Hsuan LIN, Chung-Chien SU
  • Publication number: 20230269908
    Abstract: A heat dissipation device includes a vapor chamber for contacting a heat source; at least one heat pipe having a first end and a second end connected to the vapor chamber; at least one partition disposed inside the heat pipe to partition the inside of the heat pipe into a first channel and a second channel isolated from each other; and a heat dissipation fin set disposed on the vapor chamber and partially covers the heat pipe. The vapor chamber is filled with a liquid working medium that absorbs the heat of the heat source and then gasifies into a gaseous working medium. The gaseous working medium moves into the first channel and the second channel to be condensed by the heat dissipation fin set, so the gaseous working medium is liquefied into the liquid working medium, and then the liquid working medium flows back into the vapor chamber.
    Type: Application
    Filed: February 8, 2023
    Publication date: August 24, 2023
    Inventors: Chih-Wei Chen, Cheng-Ju Chang, Chung-Chien Su, Hsiang-Chih Chuang, Jyun-Wei Huang
  • Publication number: 20230152049
    Abstract: A water supply device (10) and a tube connector structure (2) thereof, which are used for an electronic device (100) having a water inlet (101) and a water outlet (102), are disclosed. The tube connector structure (2) includes a connecting plate (21) and two tube connector plugs (22) passing through and fixed to the connecting plate (21). One of the tube connector plugs (22) is connected with the water inlet (101), and the other one of the tube connector plugs (22) is connected with the water outlet (102). Therefore, advantages of rapid connection and disconnection between the water supply device (10) and the tube connector structure (2) and saving time and labor in assembling may be accomplished.
    Type: Application
    Filed: October 3, 2022
    Publication date: May 18, 2023
    Inventors: Chih-Hsien CHEN, Yu-Cheng SHIH, Pon-Chung CHIEN, Chieh-Hui CHEN, Ying-Fu CHOU
  • Publication number: 20230107596
    Abstract: Liquid-cooled notebook computer and power supply device thereof, includes a power supply line set including AC power supply line, transformer device set in adapter and electrically connected to AC power supply line and DC power supply line electrically connected to the other side of transformer device, a water cooling device installed in adapter, and a notebook computer with infusion inlet and infusion outlet thereof respectively connected to water outlet and water inlet of water cooling device. The infusion inlet and the infusion outlet are connected to the internal chip surface of notebook computer through infusion pipeline, and a heat conduction source is attached to the chip surface. After the water pump in water cooling device is actuated, the heat conduction source transports the heat generated by the chip from the notebook computer to water cooling device for circulating exchange of cold and hot liquids for heat dissipation.
    Type: Application
    Filed: June 7, 2022
    Publication date: April 6, 2023
    Inventors: Chih-Hsien CHEN, Pon-Chung CHIEN, Yu-Cheng SHIH
  • Publication number: 20230086839
    Abstract: An enclosure for receiving a plurality of storage components is provided. The enclosure includes a deck, a top cover, a front panel, a stress distributing member, and a pair of component housings. The front panel is disposed between the deck and the top cover disposed over the deck. The stress distributing member traverses an entire width of the deck and is fastened to the deck and the top cover. A front section is defined between the front panel and the stress distributing member. The component housings are arranged in the front section. Each of the component housings has a front end facing outward the enclosure and a back end facing inward the enclosure. Each of the component housings is configured to receive at least a set of one or more of the storage components, and ends of the stress distributing member extend beyond the front ends of the component housings.
    Type: Application
    Filed: November 18, 2022
    Publication date: March 23, 2023
    Inventors: CHIEN-WEN WANG, HAN-CHUNG CHIEN, SHENG-CHAN LIN, HAO-HSIANG HSU, CHIUNG-WEI LIN, AN-HSIN CHEN
  • Patent number: 11597053
    Abstract: A polishing pad for a chemical-mechanical polishing apparatus includes a first support layer and a polishing layer. The polishing layer is present on the first support layer. The polishing layer has a top surface that faces away from the first support layer and at least one first cavity that is buried at least beneath the top surface of the polishing layer.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: March 7, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chi-Hao Huang, Hsuan-Pang Liu, Yuan-Chun Sie, Pinyen Lin, Cheng-Chung Chien
  • Publication number: 20230064001
    Abstract: A device includes a diffraction-based overlay (DBO) mark having an upper-layer pattern disposed over a lower-layer pattern, and having smallest dimension greater than about 5 micrometers. The device further includes a calibration mark having an upper-layer pattern disposed over a lower-layer pattern, positioned substantially at a center of the DBO mark, and having smallest dimension less than about 1/5 the size of the smallest dimension of the DBO mark.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Inventors: Hung-Chung CHIEN, Chih-Chieh YANG, Hao-Ken HUNG, Ming-Feng SHIEH
  • Publication number: 20230030628
    Abstract: An electronic device (10) with a liquid cooling mechanism includes an electronic device body (1), a heat dissipation module (2) and a liquid cooling module (3). The electronic device body (1) includes a housing (11) and at least one heat generating element (12) installed in the housing (11). The heat dissipation module (2) is contained in the housing (11) and attached to the heat generating element (12). The liquid cooling module (3) includes a liquid cooling pipe (31) contained in the housing (11) and attached to the heat dissipation module (2), and two ends of the liquid cooling pipe (31) have two interface portions (311) exposed from the housing (11). In this way, the liquid cooling pipe (31) is used for water cooling to achieve a desirable cooling efficiency for the electronic device (10).
    Type: Application
    Filed: May 17, 2022
    Publication date: February 2, 2023
    Inventors: Chih-Hsien CHEN, Yu-Cheng SHIH, Pon-Chung CHIEN
  • Patent number: 11558975
    Abstract: A server system comprises a deck, a front panel arranged on the deck and defining a collecting space; two doors arranged on opposite sides of the deck, and being perpendicular to the front panel; two receiving frame structures arranged between the doors in a back to back arrangement, and configured to receive multiple rows and columns of a plurality of storage drives horizontally, wherein two periphery corridors are each defined between one of the doors and one of the receiving frame structure facing the one door; two circuit boards arranged between the two receiving frame structures, wherein the two circuit boards comprise a plurality of slits, wherein a central corridor is defined between the two circuit boards; a storage cover disposed above the deck over the two periphery corridors, the central corridor, the two receiving frame structures, and the two circuit boards.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: January 17, 2023
    Assignee: CHENBRO MICOM CO., LTD.
    Inventors: Chien-Wen Wang, Han-Chung Chien, Sheng-Chan Lin, Hao-Hsiang Hsu, Chiung-Wei Lin, An-Hsin Chen
  • Patent number: 11481018
    Abstract: In one example, an electronic device may include a power source to supply power to a peripheral device, a sensor circuit to monitor a power consumption of the peripheral device, and a controller coupled to the sensor circuit to detect that the power consumption of the peripheral device is greater than a threshold and generate a popup message on a user interface of the electronic device based on the detection. The popup message may include an option. Further, the controller may direct the power source to continue to provide the power to the peripheral device in response to a determination that the option is selected prior to an expiration of a timer.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: October 25, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Te-Yueh Lin, Hao-Cheng Chuang, Chien Chung Chien
  • Publication number: 20220201382
    Abstract: Aspects of the present disclosure are directed to sensing earpiece positioning relative to user's left and right ears, and to routing audio signals based on the positioning. As may be implemented with various examples, for respective earpieces that generate audible sound, positions of opposing regions of one of the earpieces are detected relative to an ear, in which the opposing regions are along a perimeter of one of the earpieces. A sensor signal indicative of the detected positions is communicated, and audio signals of respective channels are routed to the earpieces, based on the sensor signal.
    Type: Application
    Filed: July 24, 2019
    Publication date: June 23, 2022
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Te-Yueh Lin, Wei Jen Chen, Chien Chung Chien
  • Publication number: 20220102274
    Abstract: A method of manufacturing a semiconductor device includes forming a fin structure over a substrate, forming a sacrificial gate structure over the fin structure, and etching a source/drain (S/D) region of the fin structure to form an S/D recess. The fin structure includes first semiconductor layers and second semiconductor layers alternately stacked. The method further includes depositing an insulating dielectric layer in the S/D recess, depositing an etch protection layer over a bottom portion of the insulating dielectric layer, and partially removing the insulating dielectric layer. The method further includes growing an epitaxial S/D feature in the S/D recess. The bottom portion of the insulating dielectric layer interposes the epitaxial S/D feature and the substrate.
    Type: Application
    Filed: June 10, 2021
    Publication date: March 31, 2022
    Inventors: Hung-Chung Chien, Chao-Hong Chen, Ming-Feng Shieh
  • Publication number: 20220100103
    Abstract: Semiconductor processing apparatuses and methods are provided in which a semiconductor wafer is flipped and then rotated between patterning of front and back sides of the semiconductor wafer by first and second reticles, respectively. In some embodiments, a method includes patterning, by a first reticle, a first layer on a first side of a semiconductor wafer while the first side of the semiconductor wafer is facing a first direction. The semiconductor wafer is then flipped. A second side of the semiconductor wafer that is opposite the first side faces the first direction after the flipping the semiconductor wafer. The semiconductor wafer is then rotated about a rotational axis extending along the first direction, and a second layer on the second side of the semiconductor wafer is patterned by a second reticle.
    Type: Application
    Filed: March 10, 2021
    Publication date: March 31, 2022
    Inventors: Hung-Chung CHIEN, Hao-Ken HUNG, Chih-Chieh YANG, Ming-Feng SHIEH, Chun-Ming HU
  • Patent number: 11287746
    Abstract: Semiconductor processing apparatuses and methods are provided in which a semiconductor wafer is flipped and then rotated between patterning of front and back sides of the semiconductor wafer by first and second reticles, respectively. In some embodiments, a method includes patterning, by a first reticle, a first layer on a first side of a semiconductor wafer while the first side of the semiconductor wafer is facing a first direction. The semiconductor wafer is then flipped. A second side of the semiconductor wafer that is opposite the first side faces the first direction after the flipping the semiconductor wafer. The semiconductor wafer is then rotated about a rotational axis extending along the first direction, and a second layer on the second side of the semiconductor wafer is patterned by a second reticle.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: March 29, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hung-Chung Chien, Hao-Ken Hung, Chih-Chieh Yang, Ming-Feng Shieh, Chun-Ming Hu