Abstract: An integrated circuit includes a flip-flop circuit and a gating circuit. The flip-flop circuit is arranged to receive an input data for generating a master signal during a writing mode according to a first clock signal and a second clock signal, and to output an output data according to the first clock signal and the second clock signal during a storing mode. The gating circuit is arranged for generating the first clock signal and the second clock signal according to the master signal and an input clock signal. When the input clock signal is at a signal level, the first clock signal and the second clock signal are at different logic levels. When the input clock signal is at another signal level, the first clock signal and the second clock signal are at a same logic level determined according to a signal level of the master signal.

Abstract: An automated beverage preparation apparatus includes: multiple pumps for extracting multiple fluid materials stored in multiple material containers, and pushing the extracted fluid materials to move forward; a fluid output device coupled with the multiple pumps and arranged to operably dispense fluid materials to a beverage container; a user control interface arranged to operably generate a control command; a processing circuit arranged to operably generate a corresponding control signal according to the control command; and a pump control circuit arranged to operably control the multiple pumps according to the control signal. The pump control circuit conducts a sparkling drink making operation under control of the processing circuit to cause the fluid output device to dispense different fluid materials to the beverage container in order, so as to automatically form a sparkling drink/aerated drink with a predetermined flavor within the beverage container.

Abstract: An automated beverage preparation apparatus includes: multiple pumps for extracting multiple fluid materials stored in multiple material containers, and pushing the extracted fluid materials to move forward; a fluid output device coupled with the multiple pumps and arranged to operably dispense fluid materials to a beverage container; a user control interface arranged to operably generate a control command; a processing circuit arranged to operably generate a corresponding control signal according to the control command; and a pump control circuit arranged to operably control the multiple pumps according to the control signal. The pump control circuit conducts a layered drink making operation under control of the processing circuit to cause the fluid output device to dispense different fluid materials to the beverage container, so as to automatically form a layered drink/gradient drink having at least two color layers within the beverage container.

Abstract: A circuit board structure includes a first sub-circuit board, a second sub-circuit board, and a third sub-circuit board. The first sub-circuit board has an upper surface and a lower surface opposite to each other, and includes at least one first conductive through hole. The second sub-circuit board is disposed on the upper surface of the first sub-circuit board and includes at least one second conductive through hole. The third sub-circuit board is disposed on the lower surface of the first sub-circuit board and includes at least one third conductive through hole. At least two of the first conductive through hole, the second conductive through hole, and the third conductive through hole are alternately arranged in an axial direction perpendicular to an extending direction of the first sub-circuit board. The first, second and third sub-circuit boards are electrically connected to one another.

Abstract: The invention discloses a digital signature system. The digital signature system comprises an electronic device and a data storage device. The electronic device generates a specific data by executing a specific operation, and calculates the specific data via a hash algorithm to generate a hash data. The data storage device comprises a controller, a plurality of flash memories, and a data transmission interface. The electronic device transmits the hash data to the data storage device via the transmission interface. The controller comprises a firmware. The firmware reads an unclonable function, and generates a private key according to the unclonable function, and encrypts the hash data by the private key to obtain a digital signature. The data storage device transmits the digital signature to the electronic device via the transmission interface.

Abstract: A method includes bonding a second package component to a first package component, bonding a third package component to the first package component, attaching a dummy die to the first package component, encapsulating the second package component, the third package component, and the dummy die in an encapsulant, and performing a planarization process to level a top surface of the second package component with a top surface of the encapsulant. After the planarization process, an upper portion of the encapsulant overlaps the dummy die. The dummy die is sawed-through to separate the dummy die into a first dummy die portion and a second dummy die portion. The upper portion of the encapsulant is also sawed through.

Abstract: In an embodiment, a package includes an integrated circuit device attached to a substrate; an encapsulant disposed over the substrate and laterally around the integrated circuit device, wherein a top surface of the encapsulant is coplanar with the top surface of the integrated circuit device; and a heat dissipation structure disposed over the integrated circuit device and the encapsulant, wherein the heat dissipation structure includes a spreading layer disposed over the encapsulant and the integrated circuit device, wherein the spreading layer includes a plurality of islands, wherein at least a portion of the islands are arranged as lines extending in a first direction in a plan view; a plurality of pillars disposed over the islands of the spreading layer; and nanostructures disposed over the pillars.

Abstract: A method of lithography process is provided. The method includes forming a conductive layer over a reticle. The method includes applying ionized particles to the reticle by a discharging device. The method includes forming a photoresist layer over a semiconductor substrate. The method includes securing the semiconductor substrate by a wafer electrostatic-clamp. The method also includes patterning the photoresist layer by emitting radiation from a radiation source via the reticle.

Abstract: A light emitting diode (LED) package includes a substrate, at least one micro LED chip, a black material layer, and a transparent material layer. The substrate has a width ranging from 100 micrometers to 1000 micrometers. The at least one micro LED chip is electrically mounted on a top surface of the substrate and has a width ranging from 1 micrometer to 100 micrometers. The black material layer covers the top surface of the substrate to expose the at least one micro LED chip. The transparent material layer covers the at least one micro LED chip and the black material layer.

Abstract: A method is provided for forming an integrated circuit (IC) chip package structure. The method includes providing a substrate for an interposer, and forming a conductive interconnect structure in and on the substrate for connecting a group of selected IC dies. The method includes forming warpage-reducing trenches in non-routing regions of the interposer, wherein the warpage-reducing trenches are sized and positioned based on a warpage characteristic to reduce the warpage of the chip package structure. The method also includes depositing a warpage-relief material in the warpage-reducing trenches according to the warpage characteristic to reduce the warpage of the chip package structure, and bonding the group of selected IC dies to the interposer to form a chip package structure.

Abstract: An intraocular pressure inspection device includes an intraocular pressure detection unit, a high-precision positioning system and a wide-area positioning system, wherein according to the position of the intraocular pressure detection unit, a set of high-precision coordinates output by the high-precision positioning system and a set of wide-area coordinates output by the wide-area positioning system are integrated in appropriate weights to obtain a set of more precise integrated coordinate. The above-mentioned intraocular pressure inspection device can prevent the intraocular pressure detection unit from failing to operate once it is not in the working area of the high-precision positioning system.

Abstract: A memory device, includes a memory array for storing a plurality of vector data each of which has an MSB vector and a LSB vector. The memory array includes a plurality of memory units each of which has a first bit and a second bit. The first bit is used to store the MSB vector of each vector data, the second bit is used to store the LSB vector of each vector data. A bit line corresponding to each vector data executes one time of bit-line-setup, and reads the MSB vector and the LSB vector of each vector data according to the bit line. The threshold voltage distribution of each memory unit is divided into N states, where N is a positive integer and N is less than 2 to the power of 2, and the effective bit number stored by each memory unit is less than 2.

Abstract: Semiconductor package includes substrate, first barrier layer, second barrier layer, routing via, first routing pattern, second routing pattern, semiconductor die. Substrate has through hole with tapered profile, wider at frontside surface than at backside surface of substrate. First barrier layer extends on backside surface. Second barrier layer extends along sidewalls of through hole and on frontside surface. Routing via fills through hole and is separated from sidewalls of through hole by at least second barrier layer. First routing pattern extends over first barrier layer on backside surface and over routing via. First routing pattern is electrically connected to end of routing via and has protrusion protruding towards end of routing via in correspondence of through hole. Second routing pattern extends over second barrier layer on frontside surface. Second routing pattern directly contacts another end of routing via. Semiconductor die is electrically connected to routing via by first routing pattern.

Abstract: A semiconductor device includes a substrate, an epitaxial layer, a well region, a source region, a base region, a first JFET region, a second JFET region, a gate dielectric layer and a gate layer. The epitaxial layer is at a side of the substrate. The well region is in the epitaxial layer. The source region is in the well region. The base region is in the well region and adjacent to the source region. The first JFET region is adjacent to the well region. The second JFET region is in the first JFET region. A doping concentration of the second JFET region is higher than a doping concentration of the first JFET region. The gate dielectric layer is at a side of the epitaxial layer away from the substrate. The gate layer is at a side of the gate dielectric layer away from the epitaxial layer.

Abstract: A semiconductor structure includes a semiconductor die, a redistribution circuit structure, and a terminal. The redistribution circuit structure is disposed on and electrically coupled to the semiconductor die. The terminal is disposed on and electrically coupled to the redistribution circuit structure, where the redistribution circuit structure is disposed between the semiconductor die and the terminal, and the terminal includes an under-bump metallization (UBM) and a capping layer. The UBM is disposed on and electrically coupled to the redistribution circuit structure, where the UBM includes a recess. The capping layer is disposed on and electrically coupled to the UBM, where the UBM is between the capping layer and the redistribution circuit structure, and the capping layer fills the recess of the UBM.

Abstract: A pump health analysis method and a pump health analysis device using the same are provided. A standard vibration curve of a standard pump is obtained. The standard vibration curve is converted from a time domain to a frequency domain to obtain a first frequency distribution curve. A sample vibration curve of a sample pump is obtained. The sample vibration curve is converted from the time domain to the frequency domain to obtain a second frequency distribution curve. The first frequency distribution curve is compared with the second frequency distribution curve by using a cosine similarity algorithm to obtain a health index of the sample pump.

Abstract: A package structure includes a first thermal dissipation structure, a first semiconductor die, a second semiconductor die. The first thermal dissipation structure includes a semiconductor substrate, conductive vias embedded in the semiconductor substrate, first capacitors electrically connected to the conductive vias, and a thermal transmission structure disposed over the semiconductor substrate and the conductive vias. The first semiconductor die is disposed on the first thermal dissipation structure. The second semiconductor die is disposed on the first semiconductor die opposite to the first thermal dissipation structure.

Abstract: The embodiments described herein are directed to a method for reducing fin oxidation during the formation of fin isolation regions. The method includes providing a semiconductor substrate with an n-doped region and a p-doped region formed on a top portion of the semiconductor substrate; epitaxially growing a first layer on the p-doped region; epitaxially growing a second layer different from the first layer on the n-doped region; epitaxially growing a third layer on top surfaces of the first and second layers, where the third layer is thinner than the first and second layers. The method further includes etching the first, second, and third layers to form fin structures on the semiconductor substrate and forming an isolation region between the fin structures.

Abstract: A display device includes a first substrate, a plurality of light-emitting diodes, a first wavelength conversion layer and a metasurface. The light-emitting diodes are arranged on the first substrate, in which the light-emitting diodes emit a first color light, and the light-emitting diodes includes a first light-emitting diode, a second light-emitting diode and a third light-emitting diode. The first wavelength conversion layer is on the first light-emitting diode, and configured to convert the first color light emitted from the first light-emitting diode into a second color light, in which the second color light is different from the first color light. The metasurface is above the first wavelength conversion layer, and configured to reflect the first color light and pass the second color light.

Abstract: A wafer container includes a frame, a door and at least a pair of shelves. The frame has opposite sidewalls. The pair of the shelves are respectively disposed and aligned on the opposite sidewalls of the frame. Various methods and devices are provided for holding at least one wafer to the shelves during transport.