Abstract: A memory device includes a substrate, a word line buried in the substrate and extending in a first direction, a word line cap layer over the word line, a landing pad over and in contact with the substrate and the word line cap layer, a cell contact over and in contact with the landing pad, and a bit line over the word line and extending in a second direction perpendicular to the first direction.

Abstract: A laser processing device includes a laser beam source, a compensation system, and an imaging system. The laser beam source is configured to provide a laser beam, in which a non-zero angle is defined between an optical axis of the laser beam and a normal direction of the surface of the workpiece. The compensation system includes a phase compensation sheet. The phase compensation sheet is configured to force the laser beam spreading away from the optical axis thereby forming a beam pattern, and the phase compensation sheet is designed based on the non-zero angle. The imaging system is configured to transform the beam pattern to a processing beam that focuses on a processing position, and a distance from the phase compensation sheet to the laser beam source along the optical axis is decided according to a processing depth of the processing position. A laser processing method is also disclosed.

Abstract: A method for machine tool motion control which determines a time-optimal motion plan for a hole tapping step preceded by an air cut step. The motion plan for the air cut step is computed so that the tapping tool arrives at the top of the hole to be tapped with the proper axial tapping feed speed and the proper tapping rotational velocity. First, time durations for the air cut step are computed for lateral and axial transit motions and for spindle acceleration under maximum-effort conditions. The longest of the time durations is then used to plan the air cut step, where the time-limiting axis motion is performed at maximum machine effort, and other axes have their motions planned to complete at the same time as the longest-duration axis. The technique is applicable to an air cut step before a tapping step or in between two tapping steps.

Abstract: A method for programming a multi-segment motion plan for a machine tool which uses program points defined directly on a workpiece surface, and computes a time-optimal trajectory which transitions from air cut to cutting without stopping, while arriving at a cutting start waypoint traveling at a specified cutting feed speed. The programming method also combines what are traditionally separate air cut and cutting commands into a single command, and computes the time-optimal trajectory for all segments. The underlying time-optimal trajectory computation calculates an initial motion profile for each segment based on the waypoint geometry and other constraints, and motion states at the waypoints which join the segments are optimized to provide the shortest total trajectory time. The optimized waypoint states include velocities and accelerations with non-zero values.

Abstract: A method for machine tool motion control which determines a time-optimal trajectory for a multi-segment tool path motion. Start and end waypoints for each segment of the overall motion are defined, along with other conditions such as cutting feed speed. An initial motion profile for each segment is computed based on the waypoint geometry and other constraints, and motion states at the waypoints which join the segments are optimized to provide the shortest total trajectory time. The optimized waypoint states include velocities and accelerations with non-zero values. An extra waypoint may be added to the trajectory, such as for collision avoidance, and the waypoint states are again optimized for minimum total time of the complete trajectory. Heuristic and gradient descent techniques are applied for computation of the optimum waypoint state values.

Abstract: A headphone includes an outer housing, a light guiding unit, two push buttons, a circuit board mounted in the outer housing, two switches mounted at the circuit board, and an inner housing covered to the outer housing. The outer housing has a peripheral wall, a button hole and an outer wall. An inner surface of the peripheral wall is defined as an inner periphery surface. An outer surface of the peripheral wall is defined as an outer periphery surface. The button hole penetrates through the inner periphery surface and the outer periphery surface. The outer wall is connected with the peripheral wall. An inner surface of the outer wall is defined as an interior surface. The light guiding unit is mounted in the outer housing, and the light guiding unit partially penetrates through the button hole. The two switches resist against the two push buttons.

Abstract: A headphones comprising: a shell having a sidewall, an inner sidewall surface and an open hole, an outer wall connected to the sidewall and having an inner wall surface, two first retaining walls arranged on the inner wall surface to align with the open hole; a light guiding unit arranged in the open hole and comprising: a guiding unit body passing through the open hole, a guide tab extended from the guiding unit body, a guiding unit base extended from the guide tab and placed between the two first retaining walls; and a circuit board arranged in the shell and provided with an open slot, wherein the opening of the open slot is extended inwardly from the circuit board; the guide tab is inserted into the open slot and the light guiding unit is positioned between the circuit board and the inner sidewall surface. Thus, headphones can be stably assembled.

Abstract: In a general aspect, an electronic device assembly can include a dielectric substrate having a first surface and a second surface opposite the first surface and a leadframe including: a first leadframe portion including a first plurality of signal leads; and a second leadframe portion including a second plurality of signal leads. The substrate can be coupled with a subset of the first plurality of signal leads and a subset of the second plurality of signal leads. Signal leads of the first plurality of signal leads, other than the subset of the first plurality of signal leads, can be spaced from the dielectric substrate. Signal leads of the second plurality of signal leads, other than the subset of the second plurality of signal leads, can be spaced from the dielectric substrate. The assembly can further include one or more semiconductor die that are electrically coupled with the substrate and the leadframe portions.

Abstract: A method is provided of swapping code execution among multiple microcontroller code banks. The microcontroller has computer-readable memory, a central processing unit, and an interrupt controller. The method comprises executing an instruction to process a first pointer storing an address location of a first application within a first code bank of computer-readable memory. The first application is executed based on processing the first pointer. The method also comprises replacing the address location of the first application stored within the first pointer with an address location of a second application stored with a second code bank of the computer-readable memory. The instruction to process the first pointer is executed to process the address location of the second application to execute the second application without stopping operation of the interrupt controller.

Abstract: A clamp for a cable is provided. The clamp has a first clamp portion and a second clamp portion that is moveable relative to the first clamp portion clamp a cable a cable. A pair of inserts is positioned between the first and second clamp portions for cushioning the cable and dampening vibrations. A keeper clamp portion is moveable relative to the first clamp portion and the second to provide sequential clamping of the cable. The keeper clamp portion is moved from an installation position to a first clamp position to clamp the cable between the keeper clamp portion and the first clamp portion. The second clamp portion is moved to a second clamp position to clamp the cable between the inserts positioned between the first and second clamp portions.

Abstract: A display device has a display area and a peripheral area, and includes an array substrate. The array substrate includes M number of pixel unit columns disposed in the display area and a first dummy electrode disposed in the peripheral area, where M is a positive integer greater than or equal to 2. The M number of pixel unit columns include a first pixel unit column to an Mth pixel unit column arranged in sequence. Each of the M number of pixel unit columns includes a plurality of pixel units arranged in sequence. The first dummy electrode is located on one side of the first pixel unit column. During a frame period, the first pixel unit column receives the first pixel signal, and the first dummy electrode receives the first dummy signal. The polarity of the first pixel signal is different from that of the first dummy signal.

Abstract: A method is provided. The method includes: receiving a semiconductor structure having a first material and a second material; performing a first etch on the first material for a first duration under a first etching chemistry; and performing a second etch on the second material for a second duration under a second etching chemistry, wherein the first material includes a first incubation time and the second material includes a second incubation time greater than the first incubation time under the first etching chemistry. The first material includes a third incubation time and the second material includes a fourth incubation time less than the third incubation time under the second etching chemistry.

Abstract: The present disclosure includes an improved method of making a protein. The steps and conditions were described and carried out with significantly improved protein yield, thereby reducing manufacturing cost.

Abstract: A dual mode charge control method includes steps of: detecting an input voltage of the resonance tank, a resonance current of the resonance tank, an output current of the load, and an output voltage of the load; performing a single-band charge control when determining a light-load condition or a no-load condition of the load according to the output current; compensating the output voltage to generate an upper threshold voltage in the single-band charge control, and acquiring a resonance voltage by calculating the resonance current by a resettable integrator; comparing the resonance voltage and the upper threshold voltage to generate a first control signal; generating a second control signal complementary to the first control signal by a pulse-width modulation duplicator; providing the first control signal and the second control signal to respectively control a first power switch and a second power switch of the resonance circuit.

Abstract: Current sharing in a power system having multiple PSUs comprises generating and supplying a first power and a second power to a load, and sensing a remote voltage value received by the load based on an accumulation of the first and second powers. The method further comprises determining, by the first PSU, local voltage and current values of the first power, a real impedance value of the first PSU based on the remote voltage value and the local voltage and current values of the first power, and a virtual impedance value of the first PSU based on the real impedance value of the first PSU and a reference impedance value. The method further comprises controlling generation of the first power by the first PSU based on the virtual impedance value of the first PSU.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a stack structure over a substrate, and the stack structure includes a plurality of first semiconductor layers and a plurality of second semiconductor layers alternately stacked. The method includes forming a dummy gate electrode over the first semiconductor layers and the second semiconductor layers, and forming a gate spacer layer adjacent to the dummy gate electrode. The method includes removing the second semiconductor layers to form a recess between two adjacent first semiconductor layers, and forming a dummy dielectric layer in the recess after the dummy gate electrode is formed. The dummy dielectric layer is between two adjacent first semiconductor layers. The method includes replacing the dummy gate electrode and the dummy dielectric layer with a gate structure.