Patents by Inventor Chung Chan Huang

Chung Chan Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240162349
    Abstract: A device includes a semiconductor fin, and a gate stack on sidewalls and a top surface of the semiconductor fin. The gate stack includes a high-k dielectric layer, a work-function layer overlapping a bottom portion of the high-k dielectric layer, and a blocking layer overlapping a second bottom portion of the work-function layer. A low-resistance metal layer overlaps and contacts the work-function layer and the blocking layer. The low-resistance metal layer has a resistivity value lower than second resistivity values of both of the work-function layer and the blocking layer. A gate spacer contacts a sidewall of the gate stack.
    Type: Application
    Filed: January 24, 2024
    Publication date: May 16, 2024
    Inventors: Chung-Chiang Wu, Po-Cheng Chen, Kuo-Chan Huang, Hung-Chin Chung, Hsien-Ming Lee, Chien-Hao Chen
  • Publication number: 20240126374
    Abstract: A method for touchless gesture recognition is provided. The method includes transmitting ultrasonic signals via a speaker. The method includes generating ultrasonic signals. The method includes receiving the reflected ultrasonic signals from an object via two or more microphones. The method includes computing a frequency shift according to the reflected ultrasonic signals. The method includes identifying a gesture that corresponds to a movement of the object according to the frequency shift. The method includes performing a function that corresponds to the gesture.
    Type: Application
    Filed: February 13, 2023
    Publication date: April 18, 2024
    Inventors: Yu-Xuan XU, Ching-Lung CHAN, Shih-Chung WANG, Yen-Son Paul HUANG, Shih-Chin GONG
  • Patent number: 11916146
    Abstract: A device includes a semiconductor fin, and a gate stack on sidewalls and a top surface of the semiconductor fin. The gate stack includes a high-k dielectric layer, a work-function layer overlapping a bottom portion of the high-k dielectric layer, and a blocking layer overlapping a second bottom portion of the work-function layer. A low-resistance metal layer overlaps and contacts the work-function layer and the blocking layer. The low-resistance metal layer has a resistivity value lower than second resistivity values of both of the work-function layer and the blocking layer. A gate spacer contacts a sidewall of the gate stack.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Chiang Wu, Po-Cheng Chen, Kuo-Chan Huang, Hung-Chin Chung, Hsien-Ming Lee, Chien-Hao Chen
  • Patent number: 7778209
    Abstract: The present invention refers to a passive echo cancellation device for use in a full-duplex communication system and its signal transceiving method. The full-duplex communication system comprises a transmitting end for sending a transmit signal to a wiring interface, and a receiving end for accepting a receive signal from the wiring interface. The passive echo cancellation device comprises an offset-signal-generating circuit and a passive echo cancellation circuit composed of a plurality of passive components. The offset-signal-generating circuit generates an offset signal according to the transmit signal. The passive echo cancellation circuit is serially connected between the wiring interface and the receiving end, and is connected with the offset-signal-generating circuit.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: August 17, 2010
    Assignee: Realtek Semiconductor Corp.
    Inventors: Shian Ru Lin, Chung Chan Huang
  • Publication number: 20080151787
    Abstract: The present invention refers to a passive echo cancellation device for use in a full-duplex communication system and its signal transceiving method. The full-duplex communication system comprises a transmitting end for sending a transmit signal to a wiring interface, and a receiving end for accepting a receive signal from the wiring interface. The passive echo cancellation device comprises an offset-signal-generating circuit and a passive echo cancellation circuit composed of a plurality of passive components. The offset-signal-generating circuit generates an offset signal according to the transmit signal. The passive echo cancellation circuit is serially connected between the wiring interface and the receiving end, and is connected with the offset-signal-generating circuit.
    Type: Application
    Filed: December 21, 2007
    Publication date: June 26, 2008
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: SHIAN RU LIN, CHUNG CHAN HUANG