Abstract: A method is provided for manufacturing a LED package base including providing a metal core substrate having a top surface and a bottom surface and forming two first trenches in the metal core substrate. The first trenches extend from the top surface to the bottom surface. The method further includes at least partially filling in the first trenches with first dielectric material to form dielectric isolations. The dielectric isolations divide the metal core substrate into three metal core portions. Two of the metal core portions may be configured to serve as LED package electrodes. The method also includes applying a second dielectric material to cover at least a portion of the first dielectric material, and forming a conductive layer over the second dielectric material to form circuit contacts. The conductive layer includes a first conductive material.

Abstract: A method is provided for manufacturing a LED package base including providing a metal core substrate having a top surface and a bottom surface and forming two first trenches in the metal core substrate. The first trenches extend from the top surface to the bottom surface. The method further includes at least partially filling in the first trenches with first dielectric material to form dielectric isolations. The dielectric isolations divide the metal core substrate into three metal core portions. Two of the metal core portions may be configured to serve as LED package electrodes. The method also includes applying a second dielectric material to cover at least a portion of the first dielectric material, and forming a conductive layer over the second dielectric material to form circuit contacts. The conductive layer includes a first conductive material.

Abstract: A method is provided for manufacturing a LED package base including providing a metal core substrate having a top surface and a bottom surface and forming two first trenches in the metal core substrate. The first trenches extend from the top surface to the bottom surface. The method further includes at least partially filling in the first trenches with first dielectric material to form dielectric isolations. The dielectric isolations divide the metal core substrate into three metal core portions. Two of the metal core portions may be configured to serve as LED package electrodes. The method also includes applying a second dielectric material to cover at least a portion of the first dielectric material, and forming a conductive layer over the second dielectric material to form circuit contacts. The conductive layer includes a first conductive material.

Abstract: A channelization method of digital content and an audio-video server system are provided. A received operational behavior is packaged as an execution module, and the execution module is associated with a channel number. A correlation between the channel number and the execution module is recorded in a local channel list. Accordingly, when a switch command that contains the channel number is received, the execution module corresponding to the channel number is obtained from the local channel list, so as to perform the operational behavior to use the digital content.

Abstract: A channelization method of digital content and an audio-video server system are provided. A received operational behavior is packaged as an execution module, and the execution module is associated with a channel number. A correlation between the channel number and the execution module is recorded in a local channel list. Accordingly, when a switch command that contains the channel number is received, the execution module corresponding to the channel number is obtained from the local channel list, so as to perform the operational behavior to use the digital content.

Abstract: A method is provided for manufacturing a LED package base including providing a metal core substrate having a top surface and a bottom surface and forming two first trenches in the metal core substrate. The first trenches extend from the top surface to the bottom surface, The method further includes at least partially filling in the first trenches with first dielectric material to form dielectric isolations. The dielectric isolations divide the metal core substrate into three metal core portions. Two of the metal core portions may be configured to serve as LED package electrodes. The method also includes applying a second dielectric material to cover at least a portion of the first dielectric material, and forming a conductive layer over the second dielectric material to form circuit contacts. The conductive layer includes a first conductive material.

Abstract: A channelization method of digital content and an audio-video server system are provided. A received operational behavior is packaged as an execution module, and the execution module is associated with a channel number. A correlation between the channel number and the execution module is recorded in a local channel list. Accordingly, when a switch command that contains the channel number is received, the execution module corresponding to the channel number is obtained from the local channel list, so as to perform the operational behavior to use the digital content.

Abstract: The present invention relates to a packaging structure for high-power light emitting diode (LED) chip, comprising a metal plate, insulators and a cover plate. The metal plate comprises a containing slot and isolating slots formed on the surface by working, and the insulators can be embedded in the isolating slot. After forming a hollow slot and notches on the surface of the cover plate by working, the cover plate is combined with the metal plate and insulators and at the same time, the hollow slot and the notches are corresponding to the containing slot and the isolating slots on the metal plate to form a hollowness state, followed by application of surface treatment to form soldering portions and an anti-soldering layer at the bottom of the metal plate.

Abstract: A high power LED (light-emitting diode) chip package carrier structure is disclosed and comprises a circuit board, a metal plate and a lid. The circuit board has a perforate groove for positioning a chip, and an electrode contact area formed at two sides or border of the perforate groove. The metal plate is positioned beneath the circuit board. The lid is positioned above the circuit board, and has a through groove with a width larger than the width of the perforate groove of the circuit board such that the electrode contact area can be exposed out in the through groove of the lid. Thus, the manufacturing process can be simplified and helpful to the mass production.

Abstract: A loop coupled microwave cavity, which uses a cylindrical cavity as the main body and has a lock hole on the top of the cavity in order to connect to a loop-coupling end formed by bending the long pin of an SMA connector. The long pin of the SMA extends into the cavity through the lock hole so that the top end of the long pin will touch the inner wall of the cavity to receive a microwave signal in TM012 mode to excite the cavity. On the other hand, the coaxial structure formed by the long pin and the lock hole is a quarter-wavelength transformer, so the SMA connector has both loop coupling and impedance transforming functions to increase the Q factor of the cavity. A diminutive sample is inserted into the cavity to perform the cavity perturbation method (CPM).

Abstract: A method for fabricating a pad oxide layer in integrate circuits is described. A zero oxide layer is formed on a silicon wafer, wherein a thickness of the zero oxide layer is slightly greater than the desired thickness of a pad oxide layer that is required in a subsequent process. Photolithography and etching are further conducted to pattern the zero oxide layer and the silicon wafer to form a plurality of alignment marks on the silicon wafer. A cleaning process is further conducted to remove the photoresist layer and a portion of the zero oxide layer to prevent photoresist debris remaining and to control the thickness of the zero oxide layer such that the thickness of the zero oxide layer is same as the desired thickness of the pad oxide layer that is needed in the subsequent process.

Abstract: A loop coupled microwave cavity, which uses a cylindrical cavity as the main body and has a lock hole on the top of the cavity in order to connect to a loop-coupling end formed by bending the long pin of a SMA connector. The long pin of the SMA extends into the cavity through the lock hole so that the top end of the long pin will touch the inner wall of the cavity to receive a microwave signal in TM012 mode to excite the cavity. On the other hand, the coaxial structure formed by the long pin and the lock hole is a quarter-wavelength transformer, so the SMA connector has both loop coupling and transforming functions to increase the Q factor of the cavity. A diminutive sample is inserted into the cavity to perform the cavity perturbation method (CPM).

Abstract: A method for forming a UV transmission passivation coating on an integrated circuit, such as EPROM, after completion of the active device and metal routing circuitry comprises depositing a first barrier dielectric layer over the integrated circuit; smoothing out underlying features by applying a layer of flowable dielectric over the first dielectric layer; and depositing a second dielectric layer over the flowable dielectric. Next a photoresist pattern is made over the second dielectric coating, having an opening layer over the at least one conductive pad. A wet etch process is used to remove portions of the second dielectric layer exposed by the opening. A dry etch process is used to remove portions of the remaining layers exposed through the opening, including the remaining portions of the second dielectric layer, the flowable dielectric layer and the first dielectric layer, down to the conductive pad. Finally, the photoresist is removed.

Abstract: In a CRTC scan circuit, a waste of memory space used in a character generator, such as a conventional Chinese character generator, during the scan can occur, thus an address conversion for a character generator is provided so that the memory space is completely utilized.The procedure of address conversion is carried out by dividing the MASKROM memory space which is used in a character generator into two separate pluralities of partition groups according to a "character frame space" and an "actually used space" of a character, establishing an address mapping between those two partition groups, and determining an offset value between the input and output address data in this mapping. A general rule about the relation between these two partition groups is given and an address converter to perform the procedure is disclosed.