Abstract: An embodiment of an integrated circuit chip includes a combination processing core and magnetoresistive random access memory (MRAM) circuitry integrated into the chip. The MRAM circuitry includes a plurality of MRAM cells. The MRAM cells are organized into a number of memories, including a cache memory, a main or working memory and an optional secondary storage memory. The cache memory includes multiple cache levels.

Abstract: A method of manufacturing a high voltage device is described. A well region is formed within a substrate of a high voltage device region. A gate structure is made up of a gate oxide layer, a gate and an optional cap layer that are sequentially formed upon the well. Subsequently, using the gate structure as a mask, a large tilt angle light doping process is performed on the well of the high voltage device region of the well, thereby forming a lightly doped source and drain region. Thereupon, a optional thermal drive-in procedure is performed. Next, a spacer is formed on the side of the gate structure. Using the spacer and the gate structure as a mask, a heavy doping self-aligned ion implantation process is performed on the active region of the well, thereby forming a heavily doped source and drain region.

Abstract: The present invention provides a method of forming a Metal Oxide Semiconductor (MOS) transistor on a substrate of a semiconductor wafer. A gate of the MOS transistor is formed on the substrate. A source and a drain of the MOS transistor are then formed in the substrate. An ion implantation process is performed to form a first doped region, a second doped region and a third doped region. The first doped region is positioned under the gate and overlaps with the channel of the MOS transistor. The second doped region is positioned in a predetermined portion of the substrate under the source. The third doped region is positioned in a predetermined portion of the substrate under the drain. The first doped region, the second doped region, the third doped region, the source, and the drain are all of the same type of semiconductor.

Abstract: A pounding tool comprises a pounding head and a handle fastened at one end thereof with the pounding head. The handle is provided in two opposite longitudinal sides thereof with a shock-absorbing block having a plurality of through holes for mitigating the shock wave that is transmitted to the handle from the pounding head at the time when the pounding head strikes an object.

Abstract: A pounding tool comprises a head, and a handle which is connected at one end thereof with the head and is provided with a protective jacket fitted thereover to facilitate the gripping of the handle with hand. The protective jacket is provided with a plurality of shock-absorbing through holes which are arranged in rows along the longitudinal direction of the protective jacket. The handle has a top side and a bottom side, and a direction formed from the top side to the bottom side. The head has a pounding direction which is the same as the direction which is formed from the top side to the bottom side of the handle. The through holes are located over the top side and under the bottom side of the handle.

Abstract: A hand tool comprises a head and a handle fastened at one end thereof with the head. The handle comprises a body, and a protective sleeve fitted over the body such that the protective sleeve and the body are held securely together by two fastening members, which are located in two opposite side walls of the protective sleeve and are connected by at least one connection member.