Patents by Inventor Chung-Chiang Wang

Chung-Chiang Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240088070
    Abstract: Provided is a package structure and a method of forming the same. The package structure includes a semiconductor package, a stacked patch antenna structure, and a plurality of conductive connectors. The semiconductor package includes a die. The stacked patch antenna structure is disposed on the semiconductor package, and separated from the semiconductor package by an air cavity. The plurality of conductive connectors is disposed in the air cavity between the semiconductor package and the stacked patch antenna structure to connect the semiconductor package and the stacked patch antenna structure.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Yi Hsu, Kai-Chiang Wu, Yen-Ping Wang
  • Publication number: 20030075387
    Abstract: A wafer loading device having improved lift-pin structure is provided to solve the particle clogging problems. The wafer loading device includes a pedestal with a plurality of holes for allowing the lift pins to move in vertical direction. The structure of the lift pins includes a neck portion connecting a head portion and a support portion. The neck portion is narrower than the support portion for leaving a gap in the hole. The lift ring is driven by a lift driver and disposed beneath the pedestal for controlling the movement of the lift pins.
    Type: Application
    Filed: October 22, 2001
    Publication date: April 24, 2003
    Inventors: Chung-Chiang Wang, Ming-ta Chen, Ming Kan Ju, Ming-Kuan Kao