Patents by Inventor Chung-Chih Lin
Chung-Chih Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11968856Abstract: Exemplary subpixel structures include a directional light-emitting diode structure characterized by a full-width-half-maximum (FWHM) of emitted light having a divergence angle of less than or about 10°. The subpixel structure further includes a lens positioned a first distance from the light-emitting diode structure, where the lens is shaped to focus the emitted light from the light-emitting diode structure. The subpixel structure still further includes a patterned light absorption barrier positioned a second distance from the lens. The patterned light absorption barrier defines an opening in the barrier, and the focal point of the light focused by the lens is positioned within the opening. The subpixels structures may be incorporated into a pixel structure, and pixel structures may be incorporated into a display that is free of a polarizer layer.Type: GrantFiled: October 4, 2021Date of Patent: April 23, 2024Assignee: Applied Materials, Inc.Inventors: Chung-Chih Wu, Po-Jui Chen, Hoang Yan Lin, Guo-Dong Su, Wei-Kai Lee, Chi-Jui Chang, Wan-Yu Lin, Byung Sung Kwak, Robert Jan Visser
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Patent number: 11956994Abstract: The present disclosure is generally related to 3D imaging capable OLED displays. A light field display comprises an array of 3D light field pixels, each of which comprises an array of corrugated OLED pixels, a metasurface layer disposed adjacent to the array of 3D light field pixels, and a plurality of median layers disposed between the metasurface layer and the corrugated OLED pixels. Each of the corrugated OLED pixels comprises primary or non-primary color subpixels, and produces a different view of an image through the median layers to the metasurface to form a 3D image. The corrugated OLED pixels combined with a cavity effect reduce a divergence of emitted light to enable effective beam direction manipulation by the metasurface. The metasurface having a higher refractive index and a smaller filling factor enables the deflection and direction of the emitted light from the corrugated OLED pixels to be well controlled.Type: GrantFiled: August 10, 2021Date of Patent: April 9, 2024Assignee: Applied Materials, Inc.Inventors: Chung-Chih Wu, Hoang Yan Lin, Guo-Dong Su, Zih-Rou Cyue, Li-Yu Yu, Wei-Kai Lee, Guan-Yu Chen, Chung-Chia Chen, Wan-Yu Lin, Gang Yu, Byung-Sung Kwak, Robert Jan Visser, Chi-Jui Chang
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Publication number: 20240107414Abstract: This disclosure provides systems, methods and apparatus, including computer programs encoded on computer storage media, for switching a secondary cell to a primary cell. A user equipment (UE) monitors a first radio condition of the UE for beams of a primary cell and a second radio condition for beams of one or more secondary cells configured for the UE in carrier aggregation. The UE transmits a request to configure a candidate beam of at least one candidate secondary cell as a new primary cell in response to the first radio condition not satisfying a first threshold and the second radio condition for the at least one candidate secondary cell satisfying a second threshold. A base station determines to reconfigure at least one secondary cell as the new primary cell. The base station and the UE perform a handover of the UE to the new primary cell.Type: ApplicationFiled: September 23, 2022Publication date: March 28, 2024Inventors: Yu-Chieh HUANG, Kuhn-Chang LIN, Jen-Chun CHANG, Wen-Hsin HSIA, Chia-Jou LU, Sheng-Chih WANG, Chenghsin LIN, Yeong Leong CHOO, Chun-Hsiang CHIU, Chihhung HSIEH, Kai-Chun CHENG, Chung Wei LIN
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Publication number: 20240099005Abstract: Memory devices and methods of forming the same are provided. A memory device of the present disclosure includes a bottom dielectric layer, a gate structure extending vertically from the bottom dielectric layer, a stack structure, and a dielectric layer extending between the gate structure and the stack structure. The stack structure includes a first silicide layer, a second silicide layer, an oxide layer extending bet ween the first and second silicide layers, a channel region over the oxide layer and extending between the first and second silicide layers, and an isolation layer over the second silicide layer. The first and second silicide layers include cobalt, titanium, tungsten, or palladium.Type: ApplicationFiled: November 30, 2023Publication date: March 21, 2024Inventors: Sheng-Chih Lai, Chung-Te Lin, Yung-Yu Chen
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Publication number: 20240088291Abstract: A transistor includes an insulating layer, a source region, a drain region, a channel layer, a ferroelectric layer, and a gate electrode. The source region and the drain region are respectively disposed on and in physical contact with two opposite sidewalls of the insulating layer. A thickness of the source region, a thickness of the drain region, and a thickness of the insulating layer are substantially the same. The channel layer is disposed on the insulating layer, the source region, and the drain region. The ferroelectric layer is disposed over the channel layer. The gate electrode is disposed on the ferroelectric layer.Type: ApplicationFiled: November 15, 2023Publication date: March 14, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hung-Chang Sun, Sheng-Chih Lai, Yu-Wei Jiang, Kuo-Chang Chiang, TsuChing Yang, Feng-Cheng Yang, Chung-Te Lin
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Publication number: 20240090230Abstract: A memory array and an operation method of the memory array are provided. The memory array includes first and second ferroelectric memory devices formed along a gate electrode, a channel layer and a ferroelectric layer between the gate electrode and the channel layer. The ferroelectric memory devices include: a common source/drain electrode and two respective source/drain electrodes, separately in contact with a side of the channel layer opposite to the ferroelectric layer, wherein the common source/drain electrode is disposed between the respective source/drain electrodes; and first and second auxiliary gates, capacitively coupled to the channel layer, wherein the first auxiliary gate is located between the common source/drain electrode and one of the respective source/drain electrodes, and the second auxiliary gate is located between the common source/drain electrode and the other respective source/drain electrode.Type: ApplicationFiled: January 9, 2023Publication date: March 14, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wen-Ling Lu, Chen-Jun Wu, Ya-Yun Cheng, Sheng-Chih Lai, Yi-Ching Liu, Yu-Ming Lin, Feng-Cheng Yang, Chung-Te Lin
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Publication number: 20240090226Abstract: A semiconductor structure includes a plurality of memory cells stacked up along a first direction. Each of the memory cells include a memory stack, connecting lines, and insulating layers. The memory stack includes a first dielectric layer, a channel layer disposed on the first dielectric layer, a charge trapping layer disposed on the channel layer, a second dielectric layer disposed on the charge trapping layer, and a gate layer disposed in between the channel layer and the second dielectric layer. The connecting lines are extending along the first direction and covering side surfaces of the memory stack. The insulating layers are extending along the first direction, wherein the insulating layers are located aside the connecting lines and covering the side surfaces of the memory stack.Type: ApplicationFiled: November 23, 2023Publication date: March 14, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sheng-Chih Lai, Chung-Te Lin
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Patent number: 11925030Abstract: Various embodiments of the present application are directed towards a metal-ferroelectric-metal-insulator-semiconductor (MFMIS) memory device, as well as a method for forming the MFMIS memory device. According to some embodiments of the MFMIS memory device, a first source/drain region and a second source/drain region are vertically stacked. An internal gate electrode and a semiconductor channel overlie the first source/drain region and underlie the second source/drain region. The semiconductor channel extends from the first source/drain region to the second source/drain region, and the internal gate electrode is electrically floating. A gate dielectric layer is between and borders the internal gate electrode and the semiconductor channel. A control gate electrode is on an opposite side of the internal gate electrode as the semiconductor channel and is uncovered by the second source/drain region. A ferroelectric layer is between and borders the control gate electrode and the internal gate electrode.Type: GrantFiled: November 4, 2021Date of Patent: March 5, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sheng-Chih Lai, Chung-Te Lin
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Publication number: 20230369376Abstract: A circuit that includes: a photodiode configured to absorb photons and to generate photo-carriers from the absorbed photons; a first MOSFET transistor that includes: a first channel terminal coupled to a first terminal of the photodiode and configured to collect a portion of the photo-carriers generated by the photodiode; a second channel terminal; and a gate terminal coupled to a first control voltage source; a first readout circuit configured to output a first readout voltage; a second readout circuit configured to output a second readout voltage; and a current-steering circuit configured to steer the photo-carriers generated by the photodiode to one or both of the first readout circuit and the second readout circuit.Type: ApplicationFiled: July 19, 2023Publication date: November 16, 2023Inventors: Yun-Chung Na, Szu-Lin Cheng, Shu-Lu Chen, Han-Din Liu, Hui-Wen Chen, Che-Fu Liang, Yuan-Fu Lyu, Chien-Lung Chen, Chung-Chih Lin, Kuan-Chen Chu
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Publication number: 20230280206Abstract: A photodetecting device is provided. The photodetecting device includes a silicon substrate, a germanium absorption region, and a plurality of microstructures. The silicon substrate includes a first surface and a second surface. The germanium absorption region is formed proximal to the first surface of the silicon substrate, and the germanium absorption region is configured to absorb photons and to generate photo-carriers. The plurality of microstructures are formed over the second surface of the silicon substrate, and the plurality of microstructures are configured to direct an optical signal towards the germanium absorption region. A system including an optical transmitter and an optical receiver is also provided.Type: ApplicationFiled: May 11, 2023Publication date: September 7, 2023Inventors: YEN-CHENG LU, YUN-CHUNG NA, SHU-LU CHEN, CHIEN-YU CHEN, SZU-LIN CHENG, CHUNG-CHIH LIN, YU-HSUAN LIU
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Patent number: 11749696Abstract: An optical apparatus includes: a substrate having a first material; an absorption region having a second material different from the first material, the absorption region configured to absorb photons and to generate photo-carriers including electrons and holes in response to the absorbed photons; a first well region surrounding the absorption region and arranged between the absorption region and the substrate, the first well region being doped with a first polarity; and one or more switches each controlled by a respective control signal, the one or more switches each configured to collect at least a portion of the photo-carriers based on the respective control signal and to provide the portion of the photo-carriers to a respective readout circuit.Type: GrantFiled: December 22, 2020Date of Patent: September 5, 2023Assignee: Artilux, Inc.Inventors: Yun-Chung Na, Che-Fu Liang, Szu-Lin Cheng, Shu-Lu Chen, Kuan-Chen Chu, Chung-Chih Lin, Han-Din Liu
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Publication number: 20230215902Abstract: A circuit, including: a photodetector including a first readout terminal and a second readout terminal different than the first readout terminal; a first readout circuit coupled with the first readout terminal and configured to output a first readout voltage; a second readout circuit coupled with the second readout terminal and configured to output a second readout voltage; and a common-mode analog-to-digital converter (ADC) including: a first input terminal coupled with a first voltage source; a second input terminal coupled with a common-mode generator, the common-mode generator configured to receive the first readout voltage and the second readout voltage, and to generate a common-mode voltage between the first and second readout voltages; and a first output terminal configured to output a first output signal corresponding to a magnitude of a current generated by the photodetector.Type: ApplicationFiled: March 15, 2023Publication date: July 6, 2023Inventors: Yun-Chung Na, Che-Fu Liang, Shu-Lu Chen, Szu-Lin Cheng, Han-Din Liu, Chien-Lung Chen, Yuan-Fu Lyu, Chieh-Ting Lin, Bo-Jiun Chen, Hui-Wen Chen, Shu-Wei Chu, Chung-Chih Lin, Kuan-Chen Chu
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Patent number: 11686614Abstract: A photodetecting device is provided. The photodetecting device includes a first photodetecting component including a substrate having a first absorption region configured to absorb photons having a first peak wavelength and to generate first photo-carriers, and a second photodetecting component including a second absorption region configured to absorb photons having a second peak wavelength different from the first peak wavelength and to generate second photo-carriers. The first photodetecting component further includes two first readout circuits and two first control circuits for the first photo-carriers and electrically coupled to the first absorption region.Type: GrantFiled: December 27, 2021Date of Patent: June 27, 2023Assignee: ARTILUX, INC.Inventors: Yen-Cheng Lu, Yun-Chung Na, Shu-Lu Chen, Chien-Yu Chen, Szu-Lin Cheng, Chung-Chih Lin, Yu-Hsuan Liu
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Patent number: 11637142Abstract: A circuit, including: a photodetector including a first readout terminal and a second readout terminal different than the first readout terminal; a first readout circuit coupled with the first readout terminal and configured to output a first readout voltage; a second readout circuit coupled with the second readout terminal and configured to output a second readout voltage; and a common-mode analog-to-digital converter (ADC) including: a first input terminal coupled with a first voltage source; a second input terminal coupled with a common-mode generator, the common-mode generator configured to receive the first readout voltage and the second readout voltage, and to generate a common-mode voltage between the first and second readout voltages; and a first output terminal configured to output a first output signal corresponding to a magnitude of a current generated by the photodetector.Type: GrantFiled: July 25, 2019Date of Patent: April 25, 2023Assignee: Artilux, Inc.Inventors: Yun-Chung Na, Che-Fu Liang, Shu-Lu Chen, Szu-Lin Cheng, Han-Din Liu, Chien-Lung Chen, Yuan-Fu Lyu, Chieh-Ting Lin, Bo-Jiun Chen, Hui-Wen Chen, Shu-Wei Chu, Chung-Chih Lin, Kuan-Chen Chu
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Patent number: 11340398Abstract: A waveguide structure includes a first surface having a first width, a second surface having a second width, the second surface being opposite to the first surface, and a sidewall surface connecting the first surface and the second surface. The first width is greater than the second width.Type: GrantFiled: October 24, 2019Date of Patent: May 24, 2022Assignee: ARTILUX, INC.Inventors: Szu-Lin Cheng, Chien-Yu Chen, Han-Din Liu, Chia-Peng Lin, Chung-Chih Lin, Yun-Chung Na, Pin-Tso Lin, Tsung-Ting Wu, Yu-Hsuan Liu, Kuan-Chen Chu
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Publication number: 20220120611Abstract: A photodetecting device is provided. The photodetecting device includes a first photodetecting component including a substrate having a first absorption region configured to absorb photons having a first peak wavelength and to generate first photo-carriers, and a second photodetecting component including a second absorption region configured to absorb photons having a second peak wavelength different from the first peak wavelength and to generate second photo-carriers. The first photodetecting component further includes two first readout circuits and two first control circuits for the first photo-carriers and electrically coupled to the first absorption region.Type: ApplicationFiled: December 27, 2021Publication date: April 21, 2022Inventors: YEN-CHENG LU, YUN-CHUNG NA, SHU-LU CHEN, CHIEN-YU CHEN, SZU-LIN CHENG, CHUNG-CHIH LIN, YU-HSUAN LIU
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Patent number: 11255724Abstract: A photodetecting device for detecting different wavelengths includes a first photodetecting component including a substrate and a second photodetecting component including second absorption region. The substrate includes a first absorption region configured to absorb photons having a first peak wavelength and to generate first photo-carriers. The second absorption region is supported by the substrate and configured to absorb photons having a second peak wavelength and to generate second photo-carriers. The first absorption region and the second absorption region are overlapped along a vertical direction.Type: GrantFiled: January 6, 2020Date of Patent: February 22, 2022Assignee: ARTILUX, INC.Inventors: Yen-Cheng Lu, Yun-Chung Na, Shu-Lu Chen, Chien-Yu Chen, Szu-Lin Cheng, Chung-Chih Lin, Yu-Hsuan Liu
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Publication number: 20210225922Abstract: A circuit that includes: a photodiode configured to absorb photons and to generate photo-carriers from the absorbed photons; a first MOSFET transistor that includes: a first channel terminal coupled to a first terminal of the photodiode and configured to collect a portion of the photo-carriers generated by the photodiode; a second channel terminal; and a gate terminal coupled to a first control voltage source; a first readout circuit configured to output a first readout voltage; a second readout circuit configured to output a second readout voltage; and a current-steering circuit configured to steer the photo-carriers generated by the photodiode to one or both of the first readout circuit and the second readout circuit.Type: ApplicationFiled: March 22, 2021Publication date: July 22, 2021Inventors: Yun-Chung Na, Szu-Lin Cheng, Shu-Lu Chen, Han-Din Liu, Hui-Wen Chen, Che-Fu Liang, Yuan-Fu Lyu, Chien-Lung Chen, Chung-Chih Lin, Kuan-Chen Chu
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Publication number: 20210126027Abstract: An optical apparatus including a semiconductor substrate; a first light absorption region supported by the semiconductor substrate, the first light absorption region including germanium and configured to absorb photons and to generate photo-carriers from the absorbed photons; a first layer supported by at least a portion of the semiconductor substrate and the first light absorption region, the first layer being different from the first light absorption region; one or more first switches controlled by a first control signal, the one or more first switches configured to collect at least a portion of the photo-carriers based on the first control signal; and one or more second switches controlled by a second control signal, the one or more second switches configured to collect at least a portion of the photo-carriers based on the second control signal, wherein the second control signal is different from the first control signal.Type: ApplicationFiled: December 22, 2020Publication date: April 29, 2021Inventors: Yun-Chung Na, Che-Fu Liang, Szu-Lin Cheng, Shu-Lu Chen, Kuan-Chen Chu, Chung-Chih Lin, Han-Din Liu
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Patent number: D960373Type: GrantFiled: December 7, 2020Date of Patent: August 9, 2022Assignee: Cognito Health Inc.Inventors: Li-Chin Ho, Tsai-Yu Lin, Chung-Chih Lin