Patents by Inventor Chung-Ching Huang

Chung-Ching Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11331840
    Abstract: A lamination forming system includes a melt extruder, a nozzle head and a carrier unit. The melt extruder is configured to melt a plastic raw material into a plastic melt and to deliver the same. The nozzle head includes a sprue channel that has an inlet connected to the melt extruder for entry of the melt plastic into the sprue channel, and an outlet disposed distally from the inlet to deliver the plastic melt from the sprue channel. The carrier unit includes a slide table controllable to move relative to the nozzle head. The slide table is configure to carry the plastic melt outputted from the nozzle head.
    Type: Grant
    Filed: April 26, 2019
    Date of Patent: May 17, 2022
    Assignees: FORMOSA PLASTICS CORPORATION, NATIONAL KAOHSIUNG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Chung-Ching Huang, Te-Wen Lee, Jen-Long Wu, Wen-Hao Kang, Ying-Cheng Weng
  • Publication number: 20200338798
    Abstract: A lamination forming system includes a melt extruder, a nozzle head and a carrier unit. The melt extruder is configured to melt a plastic raw material into a plastic melt and to deliver the same. The nozzle head includes a sprue channel that has an inlet connected to the melt extruder for entry of the melt plastic into the sprue channel, and an outlet disposed distally from the inlet to deliver the plastic melt from the sprue channel. The carrier unit includes a slide table controllable to move relative to the nozzle head. The slide table is configure to carry the plastic melt outputted from the nozzle head.
    Type: Application
    Filed: April 26, 2019
    Publication date: October 29, 2020
    Inventors: Chung-Ching HUANG, Te-Wen LEE, Jen-Long WU, Wen-Hao KANG, Ying-Cheng WENG
  • Patent number: 9292300
    Abstract: An embodiment of the invention provides a secure boot method for an electronic device including an embedded controller and a processor. The method includes the steps of verifying a secure loader by the embedded controller, unlocking a peripheral hardware of the electronic device by the embedded controller, and executing the secure loader by the processor.
    Type: Grant
    Filed: August 22, 2013
    Date of Patent: March 22, 2016
    Assignee: VIA TECHNOLOGIES, INC.
    Inventors: Chung-Ching Huang, Kuo-Han Chang, Yao-Wen Tang, Chun-Wei Chan
  • Patent number: 8769256
    Abstract: An operating system switching method is provided. The operating system switching method is for a computer system comprising a control unit, a memory unit, and a storage unit, wherein the storage unit comprises a first operating system and a second operating system. The steps of the method include: loading the first operating system and the second operating system into a first memory space and a second memory space of the memory unit, respectively, and setting the first memory space and the second memory space to a working state and a standby state, respectively; and performing a first switching of the operating systems, and setting the first memory space and the second memory space to the standby state and the working state.
    Type: Grant
    Filed: May 18, 2011
    Date of Patent: July 1, 2014
    Assignee: Via Technologies, Inc.
    Inventors: Chin-Hwaun Wu, Chung-Ching Huang, Kuo-Han Chang, Tai-Yu Lin
  • Publication number: 20140115314
    Abstract: An embodiment of the invention provides a secure boot method for an electronic device including an embedded controller and a processor. The method includes the steps of verifying a secure loader by the embedded controller, unlocking a peripheral hardware of the electronic device by the embedded controller, and executing the secure loader by the processor.
    Type: Application
    Filed: August 22, 2013
    Publication date: April 24, 2014
    Applicant: Via Technologies, Inc.
    Inventors: Chung-Ching HUANG, Kuo-Han CHANG, Yao-Wen TANG, Chun-Wei CHAN
  • Patent number: 8650425
    Abstract: A computer system for processing data in a non-operational state and processing method thereof are provided. The computer system includes a data output unit, a data source, a data processing module and a state monitor unit. The data processing module accesses and processes data from the data source, and transmits the processed data to the data output unit. The state monitor unit monitors a power supply state of the computer system to generate a state switch signal, which indicates whether the computer system is in an operational state or a non-operational state. When the state switch signal indicates that the computer system is in a non-operational state, the data source and the data processing module receives operating voltages to access and process data.
    Type: Grant
    Filed: May 5, 2010
    Date of Patent: February 11, 2014
    Assignee: Via Technologies, Inc.
    Inventors: Chung-Ching Huang, Yeh Cho, Kuo-Han Chang, Liang-Min Lee, Donna Lim
  • Patent number: 8607084
    Abstract: A computer system and a power-management method thereof are provided. The computer system has an image-reading mode, a first power-management mode and a second power-management mode, and the computer system operating in the second power-management mode consumes less power than it consumes in the first power-management mode. The computer system comprises a first portion comprising a graphics processing unit, a memory space and a display; and a second portion comprising a storage storing an image data. When the computer system operates in the image-reading mode, the image data has been transferred to the memory space from the storage, the second portion enters to the second power-management mode from the first power-management mode, and the first portion keeps in the first power-management mode, so that the graphics processing unit can display an image by the display according to the image data stored in the memory space.
    Type: Grant
    Filed: May 25, 2011
    Date of Patent: December 10, 2013
    Assignee: Via Technologies, Inc.
    Inventors: Chung-Ching Huang, Kuo-Han Chang, Chih-Nan Lo, Donna Lim
  • Publication number: 20120191961
    Abstract: An operating system switching method is provided. The operating system switching method is for a computer system comprising a control unit, a memory unit, and a storage unit, wherein the storage unit comprises a first operating system and a second operating system. The steps of the method include: loading the first operating system and the second operating system into a first memory space and a second memory space of the memory unit, respectively, and setting the first memory space and the second memory space to a working state and a standby state, respectively; and performing a first switching of the operating systems, and setting the first memory space and the second memory space to the standby state and the working state.
    Type: Application
    Filed: May 18, 2011
    Publication date: July 26, 2012
    Applicant: VIA TECHNOLOGIES, INC.
    Inventors: Chin-Hwaun Wu, Chung-Ching Huang, Kuo-Han Chang, Tai-Yu Lin
  • Publication number: 20120137038
    Abstract: Electronic systems supporting multiple operation modes are provided, wherein the electronic system includes a portable device and a docking system. The portable device at least includes one processing unit and a first operation module, wherein the processing unit includes a plurality of operation frequencies and is operable in a plurality of operation modes, and each operation mode corresponds to an operation frequency. The docking system includes a container for containing the portable device and a second operation module. When the portable device is plugged into the container of the docking system, the portable device receives a signal from the docking system, determines an operation mode of the portable device according to the received signal, adjusts the operation frequency of the processing unit corresponding to the operation mode and selectively applies the first modules or second modules to control the electronic system.
    Type: Application
    Filed: July 15, 2011
    Publication date: May 31, 2012
    Applicant: VIA TECHNOLOGIES, INC.
    Inventors: Chung-Ching Huang, Yeh Cho, Donna Lim
  • Patent number: 8108598
    Abstract: A hard drive assessing method and a hard drive assessing system supporting a maximum transmission rate of a hard drive are provided, wherein the hard drive is accessed by a controller, and both the controller and the hard drive support a plurality of transmission rates. The maximum transmission rate of the hard drive is first obtained. When the controller reads data from the hard drive, the transmission rate of the controller is set to be not lower than the maximum transmission rate, and the transmission rate of the hard drive is maintained at the maximum transmission rate. When the controller writes data into the hard drive, the transmission rate of the controller is reduced to be lower than the maximum transmission rate, and the transmission rate of the hard drive is maintained at the maximum transmission rate. Thereby, the hard drive can be accessed at its maximum transmission rate.
    Type: Grant
    Filed: April 1, 2009
    Date of Patent: January 31, 2012
    Assignee: VIA Technologies, Inc.
    Inventors: Chung-Ching Huang, Chin-Han Chang, Jia-Hung Wang
  • Publication number: 20110307720
    Abstract: A computer system and a power-management method thereof are provided. The computer system has an image-reading mode, a first power-management mode and a second power-management mode, and the computer system operating in the second power-management mode consumes less power than it consumes in the first power-management mode. The computer system comprises a first portion comprising a graphics processing unit, a memory space and a display; and a second portion comprising a storage storing an image data. When the computer system operates in the image-reading mode, the image data has been transferred to the memory space from the storage, the second portion enters to the second power-management mode from the first power-management mode, and the first portion keeps in the first power-management mode, so that the graphics processing unit can display an image by the display according to the image data stored in the memory space.
    Type: Application
    Filed: May 25, 2011
    Publication date: December 15, 2011
    Applicant: VIA TECHNOLOGIES, INC.
    Inventors: Chung-Ching Huang, Kuo-Han Chang, Chih-Nan Lo, Donna Lim
  • Patent number: 7900028
    Abstract: In a method used for initializing a first bus device and a second bus device sharing a common transmission engine of a bus, a first link of the first bus device and a second link of the second bus device to the common transmission engine are disabled when the computer system is booted. Next, the first link and the second link are enabled in order. Then, a first state updating signal from the first bus device is issued after the first link to the common transmission engine is established. Finally, a second state updating signal from the second bus device is issued after the first state updating signal is received and the second link to the common transmission engine is established.
    Type: Grant
    Filed: October 4, 2006
    Date of Patent: March 1, 2011
    Assignee: Via Technologies, Inc.
    Inventors: Chung-Ching Huang, Ta-Chuan Liu, Tzu-Chiang Chiu, Chin-Fa Hsiao
  • Patent number: 7861044
    Abstract: A memory access method for accessing data from a non-volatile memory in a south bridge is provided. Memory access is performed under a system management mode (SMM). Under the protection of the SMM mode, the desired memory address is not altered by an interrupt handler, therefore memory data is accessed correctly.
    Type: Grant
    Filed: November 27, 2007
    Date of Patent: December 28, 2010
    Assignee: Via Technologies, Inc.
    Inventors: Wen-Juin Huang, Chung-Ching Huang, Chien-Ping Chung
  • Publication number: 20100325326
    Abstract: A device information management system for managing device information of various peripheral devices is disclosed. The system includes a central processing unit, a logic controller connected with the central processing unit, a first device connected with the logic controller, wherein the first device has a device information stored in a memory unit for identifying the first device, and a second device connected with the first device, wherein the first device outputs an access command to the second device and the second device accesses the memory unit to retrieve the device information of the first device according to the access command.
    Type: Application
    Filed: April 12, 2010
    Publication date: December 23, 2010
    Applicant: VIA TECHNOLOGIES, INC.
    Inventors: CHUNG-CHING HUANG, YEH CHO, JIA-HUNG WANG, KUO-HAN CHANG
  • Publication number: 20100287395
    Abstract: A computer system for processing data in a non-operational state and processing method thereof are provided. The computer system includes a data output unit, a data source, a data processing module and a state monitor unit. The data processing module accesses and processes data from the data source, and transmits the processed data to the data output unit. The state monitor unit monitors a power supply state of the computer system to generate a state switch signal, which indicates whether the computer system is in an operational state or a non-operational state. When the state switch signal indicates that the computer system is in a non-operational state, the data source and the data processing module receives operating voltages to access and process data.
    Type: Application
    Filed: May 5, 2010
    Publication date: November 11, 2010
    Applicant: VIA TECHNOLOGIES, INC.
    Inventors: Chung-Ching Huang, Yeh Cho, Kuo-Han Chang, Liang-Min Lee, Donna Lim
  • Patent number: 7809239
    Abstract: In an electric appliance system, an electric appliance for performing designated functions and first and second remote controllers are included. The first remote controller is optionally triggered for controlling a first group of the designated functions, and the second remote controller is optionally triggered for controlling a second group of the designated functions. The second group includes at least one designated function included in the first group and at least one designated function excluded from the first group.
    Type: Grant
    Filed: November 7, 2005
    Date of Patent: October 5, 2010
    Assignee: Lite-On-It Corp.
    Inventors: Lu-Kang Mao, Yu-Lin Chu, Chung-Ching Huang
  • Patent number: 7802119
    Abstract: For saving power of a central processing unit at a C3 power level upon processing a bus master request from a peripheral device, an arbitrator is disabled from transmitting any request to the central processing unit at the C3 power level. Afterwards, in response to a bus master request, the central processing unit is switched from the C3power level to a transitional C0 power level while keeping the arbitrator disabled, and then switched from the transitional C0 power level to a C2 power level while enabling the arbitrator to process the bus master request.
    Type: Grant
    Filed: February 20, 2007
    Date of Patent: September 21, 2010
    Assignee: VIA Technologies, Inc.
    Inventors: Wen-Juin Huang, Chung-Ching Huang, Jui-Ming Wei
  • Publication number: 20100205365
    Abstract: A hard drive assessing method and a hard drive assessing system supporting a maximum transmission rate of a hard drive are provided, wherein the hard drive is accessed by a controller, and both the controller and the hard drive support a plurality of transmission rates. The maximum transmission rate of the hard drive is first obtained. When the controller reads data from the hard drive, the transmission rate of the controller is set to be not lower than the maximum transmission rate, and the transmission rate of the hard drive is maintained at the maximum transmission rate. When the controller writes data into the hard drive, the transmission rate of the controller is reduced to be lower than the maximum transmission rate, and the transmission rate of the hard drive is maintained at the maximum transmission rate. Thereby, the hard drive can be accessed at its maximum transmission rate.
    Type: Application
    Filed: April 1, 2009
    Publication date: August 12, 2010
    Applicant: VIA TECHNOLOGIES, INC.
    Inventors: Chung-Ching Huang, Chin-Han Chang, Jia-Hung Wang
  • Publication number: 20100199022
    Abstract: An information access method and a computer system are provided. The computer system includes a system management bus (SMBus), a non-volatile memory, a plurality of hardware devices, a chipset, and a CPU. The hardware devices have a plurality of specific recognition information. The CPU performs a configuration process on the hardware devices through the chipset according to the standard for a SMBus protocol, so as to distribute a plurality of memory spaces in the non-volatile memory to the hardware devices. The hardware devices share the SMBus for accessing the plurality of specific recognition information in the memory spaces.
    Type: Application
    Filed: March 10, 2009
    Publication date: August 5, 2010
    Applicant: VIA TECHNOLOGIES, INC.
    Inventors: Chun-Hsu Chen, Chung-Ching Huang, Chin-Han Chang
  • Patent number: 7716533
    Abstract: A bus cycle trapping system includes at least one register, a north bridge, a south bridge and a central processing unit (CPU). The register is configured to store at least one trapping parameter. The north bridge traps a bus cycle matching the at least one trapping parameter while issuing an activating signal. The south bridge sends a system management interrupt message according to the activating signal. The CPU enters a system management mode according to the system management interrupt and executes a system management interrupt routine for doing a debugging test of the bus cycle matching the trapping parameter.
    Type: Grant
    Filed: January 23, 2007
    Date of Patent: May 11, 2010
    Assignee: Via Technologies, Inc.
    Inventors: Chung-Ching Huang, Chien-Ping Chung, Yeh Cho