Abstract: Maintenance apparatuses for fluid injectors and fluid injection devices integrated therewith. The maintenance device comprises a compressor. A reservoir comprises a gas inlet hole, a gas outlet hole, and a liquid outlet hole, wherein the gas inlet hole connects the compressor via a gas pipeline. A nozzle is connected to the liquid outlet hole by a liquid pipeline. A wiping device comprises at least one wiping blade and a rail for the at least one wiping blade to slide on to maintain the nozzles of the fluid injector.

Abstract: A fluid injection device integrating a piezoelectric sensor, a fluid injection apparatus and a method for analyzing fluid content in a fluid injection device. The fluid injection device comprises a fluid injector and a piezoelectric sensor. The fluid injector comprises a plurality of fluid chambers formed in a substrate for receiving fluid. A structural layer is disposed on the substrate and the plurality of fluid chambers. At least one fluid actuator is disposed on the structural layer opposing each fluid chamber. A nozzle is adjacent to the at least one fluid actuator and connecting each fluid chamber through the structural layer. The piezoelectric sensor id disposed on the structural layer to analyze fluid content in each fluid chamber.

Abstract: An integrated converter for converting a DC power source into multiple DC output voltages is provided. In the converter, a voltage regulator is selectively coupled to the power source. A control module outputs a timing signal based on a buck/boost signal. A voltage bucking/boosting module bucks or boosts the power source based on the timing signal. When the buck/boost signal indicates a buck operation, the voltage regulator is operably coupled to the power source to generate an output voltage, and the voltage bucking/boosting module bucks the generated output voltage to generate another output voltage.

Abstract: The present invention provides a bandgap reference circuit, which includes a first current source, a second current source, a first reference circuit, a second reference circuit, and a selection circuit. The first reference circuit is coupled to the first current source and the second current source for outputting a first voltage signal. The second reference circuit is coupled to the first current source and the second current source for outputting a second voltage signal, wherein there is a phase difference between the first voltage signal and the second voltage signal. The selection circuit is coupled to the first reference circuit and the second reference circuit. One of the first voltage signal and the second voltage signal is alternatively selected by the selection circuit as an output reference voltage.

Abstract: A bandgap reference circuit, taking two or more power supplies as the input power supply for outputting a reference voltage, includes a first reference circuit, a second reference circuit, a power selection circuit and a switch circuit. The first and second reference circuits receive two respective power supplies for producing first and second voltages, respectively. As the power selection circuit takes the first power voltage level as the input voltage, the power selection circuit outputs a first control signal; while the power selection circuit takes the second power voltage level as the input voltage, the power selection circuit outputs a second control signal. The switch circuit is coupled to the power selection circuit, the first reference circuit and the second reference circuit. As the switch circuit receives the first control signal, it outputs the first voltage; while the switch circuit receives the second control signal, it outputs the second voltage.

Abstract: A capacitor structure including a first electrode set and a second electrode set is provided. The first electrode set comprises a plurality of first stripe electrodes, which are parallel to each other, and a first coupling circuit. The first coupling circuit is coupled to a part of stripe electrodes, wherein the coupled first stripe electrodes and the uncoupled first stripe electrodes are alternately arranged. In addition, the second electrode set comprises a plurality of second stripe electrodes, which are parallel to each other, and a second coupling circuit. The second coupling circuit is coupled to a part of the second stripe electrodes, wherein the coupled second stripe electrodes and the uncoupled second stripe electrodes are alternately arranged. Furthermore, the coupled first stripe electrodes are coupled to the coupled second stripe electrodes, and the uncoupled first stripe electrodes are coupled to the uncoupled second stripe electrodes.

Abstract: A boost/buck and DC/DC power converter with a charging function, a method thereof and a system incorporating the same are disclosed. The system uses an external power supply or a rechargeable battery as the power thereof. The power converter regulates the external power supply for producing the output voltage. An inductor-based booster/bucker further boosts or bucks the produced output voltage and the boosted or bucked output voltage charges the rechargeable battery.

Abstract: A capacitor structure is provided. The capacitor structure is configured in a substrate. The capacitor structure includes a plurality of electrode sets, at least a first conductive plug and at least a second conductive plug. The electrode sets correspond with each other and are disposed in different layers of the substrate. Each electrode set comprises a first electrode and a second electrode surrounding the former. In addition, the first conductive plug and the second conductive plug are disposed between two adjacent electrode sets. First electrodes of two adjacent electrode sets correspond with each other and are electrically connected to each other through the first conductive plug. Similarly, second electrodes of two adjacent electrode sets correspond with each other and are electrically connected to each other through the second conductive plug.

Abstract: A memory device and a method for burn in test are characterized by a plurality of sub-array word line leak-current limited units and a plurality of single word line leak-current limited units. They are used to limit the current in each word line to a predetermined word line current value. In burn-in test mode, the output of a word line driver is kept in a high impedance state. The bit line stress voltage is applied to the row of memory cells through a normal read-write path. A voltage generator for generating a substantially stable voltage is also provided. In burn-in test mode, the even word lines and the odd word lines are grouped separately and the word line stress voltage is applied to the even word lines and to the odd word lines alternately.

Abstract: A memory device and a method for burn-in test. The memory device has a plurality of sub-array word line leak-current limited units and a plurality of single word line leak-current limited units. They are used to limit the current in each word line to a predetermined word line current value. In burn-in test mode, the output of a word line driver is kept in a high impedance state. The bit line stress voltage is applied to the row of memory cells through a normal read-write path. A voltage generator for generating a substantially stable voltage is also provided. In burn-in test mode, the even word lines and the odd word lines are grouped separately and the word line stress voltage is applied to the even word lines and to the odd word lines alternately.

Abstract: A LVDS (Low Voltage Differential Signal) driver with a high PSRR (Power Supply Rejection Ration) includes a first current source for providing a working current, a switch unit for receiving the working current and determining the current directions of an output current at first and second signal nodes according to first and second input signals, a second current source connected between the switch unit and a low working power voltage, a common mode feedback unit for generating a common mode control signal according to voltages on the first and second signal nodes of the switch unit, a common mode resistance unit connected in parallel with the second current source and having a resistance value controlled by the common mode control signal, and a compensation unit connected in parallel with the second current source for compensating the current variation of the first current source caused by power noise.

Abstract: This invention relates to a method for producing an alkyl ester via a transesterification or esterification reaction. The method includes (1) mixing an oil source containing a triglyceride or a carboxylic acid and a first primary alcohol or a first secondary alcohol in a first organic solvent to form a first solution; in which each molecule of the first organic solvent contains 4-8 carbon atoms and a heteroatom; (2) reacting the triglyceride or the carboxylic acid with the first primary alcohol or the first secondary alcohol in the presence of a first lipase to produce a first alkyl ester, in which the first solution does not undergo phase separation throughout the reaction; and (3) separating the first alkyl ester from the first solution.

Abstract: An apparatus that includes a first reactor and a return mechanism. The first reactor has an inlet to receive a mixture comprising a first reactant, a second reactant, a reaction product, and an inert solvent that dissolves at least a portion of the first and second reactants, an enzyme to facilitate a reaction between the first and second reactants to generate more reaction product, and an outlet to output the reaction product, including the reaction product received at the inlet and the reaction product generated from the reaction between the first and second reactants. The return mechanism sends at least a portion of the reaction product from the outlet back to the inlet.

Abstract: A memory device and a method for burn-in test are described. The memory device has a plurality of sub-array word line leak-current limited units and a plurality of single word line leak-current limited units. They are used to limit the current in each word line to a predetermined word line current value. In burn-in test mode, the output of a word line driver is kept in a high impedance state. The bit line stress voltage is applied to the row of memory cells through a normal read-write path. A voltage generator for generating a substantially stable voltage is also provided. In burn-in test mode, the even word lines and the odd word lines are grouped separately and the word line stress voltage is applied to the even word lines and to the odd word lines alternately.

Abstract: A voltage regulator, regulating a supply voltage and outputting a regulated voltage. The voltage regulator comprises a two stage OP which outputs a first voltage and a second voltage according to a reference voltage and a feedback voltage. A NMOS transistor controlled by a voltage detection unit, to receive the second voltage when the detected supply voltage is in a high mode. A PMOS transistor controlled by the voltage detection unit, to receive the first voltage when the detected supply voltage is in a low mode. A feedback circuit for receiving the regulated voltage and outputting the feedback voltage to the two stage OP.

Abstract: A voltage regulator, regulating a supply voltage and outputting a regulated voltage. The voltage regulator comprises a two stage OP which outputs a first voltage and a second voltage according to a reference voltage and a feedback voltage. A NMOS transistor controlled by a voltage detection unit, to receive the second voltage when the detected supply voltage is in a high mode. A PMOS transistor controlled by the voltage detection unit, to receive the first voltage when the detected supply voltage is in a low mode. A feedback circuit for receiving the regulated voltage and outputting the feedback voltage to the two stage OP.

Abstract: An electronic pen device is proposed, which can be coupled to a computer platform having a display unit and an input-sensing unit, allowing a user to manually input data and/or graphs to the computer platform via the electronic pen device. The electronic pen device includes a micro-processing unit (MPU), a storage unit for storing color-corresponding codes, an input unit for allowing the user to set a display color for the handwriting data and/or graphs to be displayed on the display unit, and a signal output module. The MPU retrieves a color-corresponding code from the storage unit corresponding to the set display color and sends a color signal corresponding to the color-corresponding code to the signal output module that further sends the color signal to the computer platform. The display unit then displays the handwriting data and/or graphs in the set display color responsive to the color signal.

Abstract: Disclosed is a method for forming a bottle shaped trench. The method of the present invention includes steps of providing a substrate; forming a plurality of operation layers on the substrate; forming a photoresist layer on the operation layers to define a predetermined position; forming a trench according to the predetermined position; implanting predetermined ions, which reduces oxidizing rate of the sidewall of the trench, into the upper sidewall of the trench; oxidizing the sidewall of the trench to form an oxide layer, in which the portion of the oxide layer formed at the portion of the sidewall implanted with the ions is thin, while the portion of the oxide layer formed at the portion of the sidewall not implanted with the ions is thick; and removing the oxide layer to form a bottle shaped trench.

Abstract: A method for forming a trench capacitor. A semiconductor substrate with a trench is provided, and a trench capacitor is formed in the trench with a storage node and a node dielectric layer. The top portion of the trench is ion implanted to a predetermined angle to form an ion doped area on a sidewall of the top portion of the trench and a top surface of the trench capacitor. The ion doped area is oxidized to form an oxide layer. A sidewall semiconductor layer is formed on another sidewall using the oxide layer as a mask, and then the oxide layer is removed. A barrier layer is conformally formed on the surface of the trench, and the trench is filled with a conducting layer.

Abstract: A voltage regulator apparatus, wherein two transistors are coupled to an output terminal of a voltage regulator, so as to improve the transient response of output voltage and increase the stability of the output voltage. Besides, it avoids the use of an external capacitor.