Abstract: A substrate and a substrate bonding device using the same are provided. The substrate includes a base, upper and lower metal layers, and upper and lower covering layers. The base has an upper surface, a lower surface and a through-hole passing there through, wherein the upper and lower covering layers respectively covers the upper and lower metal layers respectively disposed on the upper and lower surfaces of the base. The lower metal layer has an electrical bonding portion and a strengthening bonding portion insulated with each other. The strengthening bonding portion enhances the bonding strength between the substrate and another substrate. The upper metal layer is electrically connected to the electrical bonding portion via the through hole. The lower covering layer exposes the electrical bonding portion and the strengthening bonding portion so as to be respectively connected with two bonding portions of the another substrate.

Abstract: A substrate and a substrate bonding device using the same are provided. The substrate includes a base, upper and lower metal layers, and upper and lower covering layers. The base has an upper surface, a lower surface and a through-hole passing there through, wherein the upper and lower covering layers respectively covers the upper and lower metal layers respectively disposed on the upper and lower surfaces of the base. The lower metal layer has an electrical bonding portion and a strengthening bonding portion insulated with each other. The strengthening bonding portion enhances the bonding strength between the substrate and another substrate. The upper metal layer is electrically connected to the electrical bonding portion via the through hole. The lower covering layer exposes the electrical bonding portion and the strengthening bonding portion so as to be respectively connected with two bonding portions of the another substrate.

Abstract: A new architecture and method of a cellular phone embedded system consists of an application system interface sector and an execution system interface sector. The application system interface sector includes an application program executed on a cellular phone platform system, and a conversion to a PIFF format is performed by a program compiling software and an MVM application program code. The converted PIFF format is downloaded to the execution system interface sector, so as to enable an internal OS management system to be an open system program sector. The execution system interface sector contains an MVM subsystem, and the converted PIFF format is linked to an MVM system program code (ORGAN.lib) by an MVM internal system program operating platform and the application system interface sector. Moreover, an active fast dynamic address linking and static address linking is used to constitute a new architecture of system platform.

Abstract: A new architecture and method of a cellular phone embedded system consists of an application system interface sector and an execution system interface sector. The application system interface sector includes an application program executed on a cellular phone platform system, and a conversion to a PIFF format is performed by a program compiling software and an MVM application program code. The converted PIFF format is downloaded to the execution system interface sector, so as to enable an internal OS management system to be an open system program sector. The execution system interface sector contains an MVM subsystem, and the converted PIFF format is linked to an MVM system program code (ORGAN.lib) by an MVM internal system program operating platform and the application system interface sector. Moreover, an active fast dynamic address linking and static address linking is used to constitute a new architecture of system platform.

Abstract: A virtual memory device includes a bridge circuit wherein in an integrated SOC device, a bridge circuit with less than 10% die size and a non-volatile XIP random access memory is used to connect to a high efficiency memory bridge circuit, so as to facilitate an improvement of boot-up speed and MMI initialization of a portable mobile device, and performance of network searching and network protocol of a wireless station, as well as a reduction of cost of the entire memory, upon applying inside the portable wireless mobile device. The invention includes an integrated SOC application system interface, incorporating a NAND flash memory, an XIP non-volatile random access memory, a programmable MIF bridge, and a volatile XIP random access memory, is used to perform a virtual memory without an MCU system control interface being a new architecture of MCU system control interface, by means of software simulation.

Abstract: A memory device with debug mode. The memory device has a memory unit, a debug mode controller and three buffers. The memory unit accesses desired data according to an address signal and a command signal. The debug mode controller enables the three buffers to buffer address signals, command signals and the corresponding data according to an enable signal from a microprocessor, and detects whether the desired data, the address signal and the command signal change. The three buffers store the desired data, the address signal and the command signal when the desired data, the address signal and the command signal change. The microprocessor may execute a debug analysis according to the address signals, command signal, and the corresponding data stored in the three buffers of the memory device.

Abstract: A memory device with power-saving mode. A memory unit is coupled to an electronic device to access desired data according to an input signal, wherein the electronic device has an operating voltage and the memory unit comprises an input buffer, a decoder, a memory array, an output buffer and a DC voltage generator. A voltage detector is coupled to the electronic device to detect operating voltage. When operating voltage falls below a predetermined value, and outputs a disable signal to turn off the input buffer and the output buffer, or enters a power-saving mode to apply required voltage with low potential to the input buffer, the decoder, the memory array, and the output buffer, thereby saving power.

Abstract: A method for memory device block movement. The method comprises the steps of decoding a block movement command carrying a start address, destination address and move length to generate a block movement signal, generating a first, second and third loading signal when the block movement signal is asserted, receiving the start address, destination address and move length when the loading signals are asserted respectively, during a read cycle, outputting the start address to the memory device to transfer data of a buffer length at a location beginning from the start address in the memory device into a buffer, during a write cycle, transferring the data from the buffer to a location beginning from the destination address in the memory device, subtracting the move length by the buffer length, and adding the buffer length to the start and destination address.