Patents by Inventor Chung Chyung (Justin) Han

Chung Chyung (Justin) Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9768144
    Abstract: Embodiments of the present disclosure provide an apparatus comprising a semiconductor substrate having a first surface, a second surface that is disposed opposite to the first surface, wherein at least a portion of the first surface is recessed to form a recessed region of the semiconductor substrate, and one or more vias formed in the recessed region of the semiconductor substrate to provide an electrical or thermal pathway between the first surface and the second surface of the semiconductor substrate, and a die coupled to the semiconductor substrate, the die being electrically coupled to the one or more vias formed in the recessed region of the semiconductor substrate. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: February 5, 2016
    Date of Patent: September 19, 2017
    Assignee: Marvell World Trade Ltd.
    Inventors: Albert Wu, Roawen Chen, Chung Chyung (Justin) Han, Shiann-Ming Liou, Chien-Chuan Wei, Runzi Chang, Scott Wu, Chuan-Cheng Cheng
  • Patent number: 9391045
    Abstract: Embodiments of the present disclosure provide a method, comprising providing a semiconductor substrate having (i) a first surface and (ii) a second surface that is disposed opposite to the first surface, forming one or more vias in the first surface of the semiconductor substrate, the one or more vias initially passing through only a portion of the semiconductor substrate without reaching the second surface, forming a dielectric film on the first surface of the semiconductor substrate, forming a redistribution layer on the dielectric film, the redistribution layer being electrically coupled to the one or more vias, coupling one or more dies to the redistribution layer, forming a molding compound to encapsulate at least a portion of the one or more dies, and recessing the second surface of the semiconductor substrate to expose the one or more vias. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: May 18, 2015
    Date of Patent: July 12, 2016
    Assignee: Marvell World Trade Ltd.
    Inventors: Albert Wu, Roawen Chen, Chung Chyung (Justin) Han, Shiann-Ming Liou, Chien-Chuan Wei, Runzi Chang, Scott Wu, Chuan-Cheng Cheng
  • Publication number: 20160155732
    Abstract: Embodiments of the present disclosure provide an apparatus comprising a semiconductor substrate having a first surface, a second surface that is disposed opposite to the first surface, wherein at least a portion of the first surface is recessed to form a recessed region of the semiconductor substrate, and one or more vias formed in the recessed region of the semiconductor substrate to provide an electrical or thermal pathway between the first surface and the second surface of the semiconductor substrate, and a die coupled to the semiconductor substrate, the die being electrically coupled to the one or more vias formed in the recessed region of the semiconductor substrate. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: February 5, 2016
    Publication date: June 2, 2016
    Inventors: Albert Wu, Roawen Chen, Chung Chyung (Justin) Han, Shiann-Ming Liou, Chien-Chuan Wei, Runzi Chang, Scott Wu, Chuan-Cheng Cheng
  • Publication number: 20150279806
    Abstract: Embodiments of the present disclosure provide a method, comprising providing a semiconductor substrate having (i) a first surface and (ii) a second surface that is disposed opposite to the first surface, forming one or more vias in the first surface of the semiconductor substrate, the one or more vias initially passing through only a portion of the semiconductor substrate without reaching the second surface, forming a dielectric film on the first surface of the semiconductor substrate, forming a redistribution layer on the dielectric film, the redistribution layer being electrically coupled to the one or more vias, coupling one or more dies to the redistribution layer, forming a molding compound to encapsulate at least a portion of the one or more dies, and recessing the second surface of the semiconductor substrate to expose the one or more vias. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: May 18, 2015
    Publication date: October 1, 2015
    Inventors: Albert Wu, Roawen Chen, Chung Chyung (Justin) Han, Shiann-Ming Liou, Chien-Chuan Wei, Runzi Chang, Scott Wu, Chuan-Cheng Cheng