Patents by Inventor Chung-Hao LIN

Chung-Hao LIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240274569
    Abstract: An integrated circuit and method of making an integrated circuit is provided. The integrated circuit includes an electrically conductive pad having a generally planar top surface that includes a cavity having a bottom surface and sidewalls extending from the bottom surface of the cavity to the top surface of the pad. An electronic device is attached to the top surface of the electrically conductive pad. A wire bond is attached from the electronic device to the bottom surface of the cavity. A molding compound encapsulates the electronic device.
    Type: Application
    Filed: March 26, 2024
    Publication date: August 15, 2024
    Inventors: Bo-Hsun Pan, Hung-Yu Chou, Chung-Hao Lin, Yuh-Harng Chien
  • Patent number: 12046071
    Abstract: An aspect of the present invention provides an optical imaging device including a first detecting unit. The first detecting unit includes a plurality of first pixels, a first opaque layer and at least one first micro-lens. The plurality of first pixels respectively has a plurality of first optoelectronic elements. The first opaque layer has at least one opening and is disposed over the plurality of first optoelectronic elements. The at least one first micro-lens is disposed over the first opaque layer, and overlaps at least one of the plurality of first pixels.
    Type: Grant
    Filed: April 7, 2021
    Date of Patent: July 23, 2024
    Assignee: VISERA TECHNOLOGIES COMPANY LIMITED
    Inventors: Chin-Chuan Hsieh, Wei-Ko Wang, Hsin-Wei Mao, Chung-Hao Lin
  • Patent number: 11942448
    Abstract: An integrated circuit and method of making an integrated circuit is provided. The integrated circuit includes an electrically conductive pad having a generally planar top surface that includes a cavity having a bottom surface and sidewalls extending from the bottom surface of the cavity to the top surface of the pad. An electronic device is attached to the top surface of the electrically conductive pad. A wire bond is attached from the electronic device to the bottom surface of the cavity. A molding compound encapsulates the electronic device.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: March 26, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Bo-Hsun Pan, Hung-Yu Chou, Chung-Hao Lin, Yuh-Harng Chien
  • Publication number: 20240068124
    Abstract: An apparatus for producing silicon carbide crystal is provided and includes a composite structure formed by a plurality of graphite layers and silicon carbide seed crystals, wherein a density or thickness of each layer of graphite is gradually adjusted to reduce a difference of a thermal expansion coefficient and Young's modulus between the graphite layers and silicon carbide. The composite structure can be stabilized on a top portion or an upper cover of a crucible made of graphite, thereby preventing the silicon carbide crystal from falling off.
    Type: Application
    Filed: August 23, 2023
    Publication date: February 29, 2024
    Inventors: CHIH-LUNG LIN, PO-FEI YANG, CHIE-SHENG LIU, CHUNG-HAO LIN, HSIN-CHEN YEH, HAO-WEN WU
  • Patent number: 11862538
    Abstract: In some examples a semiconductor chip package includes a conductive terminal. In addition, the semiconductor chip package includes a die pad including a top side and a recess extending into the top side. The die pad is downset relative to the conductive terminal. Further, the semiconductor ship package includes a semiconductor die positioned within the recess, wherein the semiconductor die has an outer perimeter, and a solder fillet engaged within the recess and with the outer perimeter of the semiconductor die. Still further, the semiconductor chip package includes a wire bond coupled to the semiconductor die and the conductive terminal, and a mold compound covering the conductive terminal, the wire bond, the die pad, and the semiconductor die.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: January 2, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Chung-Hao Lin, Hung-Yu Chou, Bo-Hsun Pan, Dong-Ren Peng, Pi-Chiang Huang, Yuh-Harng Chien
  • Publication number: 20230063262
    Abstract: In some examples a semiconductor chip package includes a conductive terminal. In addition, the semiconductor chip package includes a die pad including a top side and a recess extending into the top side. The die pad is downset relative to the conductive terminal. Further, the semiconductor ship package includes a semiconductor die positioned within the recess, wherein the semiconductor die has an outer perimeter, and a solder fillet engaged within the recess and with the outer perimeter of the semiconductor die. Still further, the semiconductor chip package includes a wire bond coupled to the semiconductor die and the conductive terminal, and a mold compound covering the conductive terminal, the wire bond, the die pad, and the semiconductor die.
    Type: Application
    Filed: August 31, 2021
    Publication date: March 2, 2023
    Inventors: Chung-Hao LIN, Hung-Yu CHOU, Bo-Hsun PAN, Dong-Ren PENG, Pi-Chiang HUANG, Yuh-Harng CHIEN
  • Publication number: 20230016577
    Abstract: An integrated circuit and method of making an integrated circuit is provided. The integrated circuit includes an electrically conductive pad having a generally planar top surface that includes a cavity having a bottom surface and sidewalls extending from the bottom surface of the cavity to the top surface of the pad. An electronic device is attached to the top surface of the electrically conductive pad. A wire bond is attached from the electronic device to the bottom surface of the cavity. A molding compound encapsulates the electronic device.
    Type: Application
    Filed: July 16, 2021
    Publication date: January 19, 2023
    Inventors: Bo-Hsun Pan, Hung-Yu Chou, Chung-Hao Lin, Yuh-Harng Chien
  • Patent number: 11314004
    Abstract: An optical filter and a method for forming the same are provided. The optical filter includes a substrate and a plurality of filter stacks formed on the substrate. Each of the plurality of filter stacks includes a higher-refractive-index layer, a medium-refractive-index layer, and a lower-refractive-index layer. The higher-refractive-index layer has a first refractive index of higher than 3.5. The medium-refractive-index layer is disposed on the higher-refractive-index layer. The medium-refractive-index layer has a second refractive index higher than 2.9 and lower than the first refractive index. The lower-refractive-index layer is disposed on the medium-refractive-index layer. The lower-refractive-index layer has a third refractive index lower than the second refractive index.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: April 26, 2022
    Assignee: VISERA TECHNOLOGIES COMPANY LIMITED
    Inventors: Yu-Jen Chen, Chung-Hao Lin, Shih-Liang Ku
  • Publication number: 20210351216
    Abstract: An aspect of the present invention provides an optical imaging device including a first detecting unit. The first detecting unit includes a plurality of first pixels, a first opaque layer and at least one first micro-lens. The plurality of first pixels respectively has a plurality of first optoelectronic elements. The first opaque layer has at least one opening and is disposed over the plurality of first optoelectronic elements. The at least one first micro-lens is disposed over the first opaque layer, and overlaps at least one of the plurality of first pixels.
    Type: Application
    Filed: April 7, 2021
    Publication date: November 11, 2021
    Inventors: Chin-Chuan HSIEH, Wei-Ko WANG, Hsin-Wei MAO, Chung-Hao LIN
  • Publication number: 20200319386
    Abstract: An optical filter and a method for forming the same are provided. The optical filter includes a substrate and a plurality of filter stacks formed on the substrate. Each of the plurality of filter stacks includes a higher-refractive-index layer, a medium-refractive-index layer, and a lower-refractive-index layer. The higher-refractive-index layer has a first refractive index of higher than 3.5. The medium-refractive-index layer is disposed on the higher-refractive-index layer. The medium-refractive-index layer has a second refractive index higher than 2.9 and lower than the first refractive index. The lower-refractive-index layer is disposed on the medium-refractive-index layer. The lower-refractive-index layer has a third refractive index lower than the second refractive index.
    Type: Application
    Filed: April 8, 2019
    Publication date: October 8, 2020
    Inventors: Yu-Jen CHEN, Chung-Hao LIN, Shih-Liang KU
  • Patent number: 10573581
    Abstract: A leadframe has a peripheral frame. A die attach pad (DAP) is positioned inwardly and downwardly of the peripheral frame. Two spaced apart parallel arms engage one side of the DAP. In one embodiment the arms are portions of a U-shaped strap.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: February 25, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Chih-Chien Ho, Chung-Hao Lin, Yuh-Harng Chien
  • Patent number: 10319760
    Abstract: An image sensor includes a sensing layer, a number of filter units, and a grid structure. The filter units are disposed on the sensing layer. The grid structure is disposed on the sensing layer and surrounding each of the filter units. The grid structure includes a first partition wall disposed on the sensing layer and located between two adjacent filter units, and a second partition wall disposed on the first partition wall located between the two adjacent filter units. The refractive index of the first partition wall is less than the refractive index of the second partition wall.
    Type: Grant
    Filed: July 20, 2015
    Date of Patent: June 11, 2019
    Assignee: Visera Technologies Company Limited
    Inventors: Kuo-Feng Lin, Wu-Cheng Kuo, Chung-Hao Lin, Yu-Kun Hsiao
  • Patent number: 9948839
    Abstract: An image sensor includes a sensing layer, a transparent plate, and a first guided-mode resonance structure. The sensing layer includes sensing units configured to sense a light beam. The transparent plate is located above the sensing layer. The first guided-mode resonance structure is disposed on a first area of the transparent plate, and blocks a first waveband of the light beam from passing through.
    Type: Grant
    Filed: January 4, 2016
    Date of Patent: April 17, 2018
    Assignee: Visera Technologies Company Limited
    Inventors: Wu-Cheng Kuo, Kuo-Feng Lin, Chung-Hao Lin, Yu-Kun Hsiao
  • Publication number: 20180090419
    Abstract: A leadframe has a peripheral frame. A die attach pad (DAP) is positioned inwardly and downwardly of the peripheral frame. Two spaced apart parallel arms engage one side of the DAP. In one embodiment the arms are portions of a U-shaped strap.
    Type: Application
    Filed: September 29, 2016
    Publication date: March 29, 2018
    Inventors: Chih-Chien Ho, Chung-Hao Lin, Yuh-Harng Chien
  • Patent number: 9876995
    Abstract: The present invention provides an image sensor, including: a sensor array layer formed of a plurality of normal sensor units and a plurality of spectrometer sensor units; a first guided mode resonance (GMR) structure having a first grating pitch and disposed on the sensor array layer to cover N (where N is an integer) of the spectrometer sensor units; a second GMR structure having a second grating pitch and disposed on the sensor array layer to cover N of the spectrometer sensor units; and a plurality of color filter units disposed on the sensor array layer to cover the normal sensor units.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: January 23, 2018
    Assignee: VISERA TECHNOLOGIES COMPANY LIMITED
    Inventors: Kuo-Feng Lin, Wu-Cheng Kuo, Chung-Hao Lin, Yu-Kun Hsiao
  • Patent number: 9837455
    Abstract: An image sensor includes a sensing layer, filter units, and a grid structure. The filter units are disposed on the sensing layer. The grid structure is disposed on the filter units, and includes grating portions. The grating portions form a number of grating groups, and each of the grating groups is separated from each other.
    Type: Grant
    Filed: January 20, 2016
    Date of Patent: December 5, 2017
    Assignee: Visera Technologies Company Limited
    Inventors: Chung-Hao Lin, Wu-Cheng Kuo, Kuo-Feng Lin, Yu-Kun Hsiao
  • Publication number: 20170207258
    Abstract: An image sensor includes a sensing layer, filter units, and a grid structure. The filter units are disposed on the sensing layer. The grid structure is disposed on the filter units, and includes grating portions. The grating portions form a number of grating groups, and each of the grating groups is separated from each other.
    Type: Application
    Filed: January 20, 2016
    Publication date: July 20, 2017
    Inventors: Chung-Hao Lin, Wu-Cheng Kuo, Kuo-Feng Lin, Yu-Kun Hsiao
  • Publication number: 20170195532
    Abstract: An image sensor includes a sensing layer, a transparent plate, and a first guided-mode resonance structure. The sensing layer includes sensing units configured to sense a light beam. The transparent plate is located above the sensing layer. The first guided-mode resonance structure is disposed on a first area of the transparent plate, and blocks a first waveband of the light beam from passing through.
    Type: Application
    Filed: January 4, 2016
    Publication date: July 6, 2017
    Inventors: Wu-Cheng Kuo, Kuo-Feng Lin, Chung-Hao Lin, Yu-Kun Hsiao
  • Publication number: 20170160133
    Abstract: The present invention provides an image sensor, including: a sensor array layer formed of a plurality of normal sensor units and a plurality of spectrometer sensor units; a first guided mode resonance (GMR) structure having a first grating pitch and disposed on the sensor array layer to cover N (where N is an integer) of the spectrometer sensor units; a second GMR structure having a second grating pitch and disposed on the sensor array layer to cover N of the spectrometer sensor units; and a plurality of color filter units disposed on the sensor array layer to cover the normal sensor units.
    Type: Application
    Filed: December 4, 2015
    Publication date: June 8, 2017
    Inventors: Kuo-Feng LIN, Wu-Cheng KUO, Chung-Hao LIN, Yu-Kun HSIAO
  • Patent number: 9564462
    Abstract: An image-sensor structure is provided. The image-sensor structure includes a substrate, a plurality of photoelectric conversion units formed in the substrate, and a plurality of color filter patterns including a red filter pattern having a first refractive index, a green filter pattern having a second refractive index and a blue filter pattern having a third refractive index formed above the substrate and the photoelectric conversion units, wherein at least one color filter pattern contains a component having a specific refractive index such that the second refractive index of the green filter pattern is higher than the first refractive index of the red filter pattern and the third refractive index of the blue filter pattern.
    Type: Grant
    Filed: October 1, 2014
    Date of Patent: February 7, 2017
    Assignee: VISERA TECHNOLOGIES COMPANY LIMITED
    Inventors: Chung-Jung Hsu, Yu-Kun Hsiao, Chung-Hao Lin