Patents by Inventor Chung Hao Tien

Chung Hao Tien has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240120200
    Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary method of forming a semiconductor device comprises receiving a structure including a substrate and a first hard mask over the substrate, the first hard mask having at least two separate portions; forming spacers along sidewalls of the at least two portions of the first hard mask with a space between the spacers; forming a second hard mask in the space; forming a first cut in the at least two portions of the first hard mask; forming a second cut in the second hard mask; and depositing a cut hard mask in the first cut and the second cut.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 11, 2024
    Inventors: Hsi-Wen Tien, Wei-Hao Liao, Pin-Ren Dai, Chih Wei Lu, Chung-Ju Lee
  • Patent number: 11942364
    Abstract: In some embodiments, the present disclosure relates to a method of forming an interconnect. The method includes forming an etch stop layer (ESL) over a lower conductive structure and forming one or more dielectric layers over the ESL. A first patterning process is performed on the one or more dielectric layers to form interconnect opening and a second patterning process is performed on the one or more dielectric layers to increase a depth of the interconnect opening and expose an upper surface of the ESL. A protective layer is selectively formed on sidewalls of the one or more dielectric layers forming the interconnect opening. A third patterning process is performed to remove portions of the ESL that are uncovered by the one or more dielectric layers and the protective layer and to expose the lower conductive structure. A conductive material is formed within the interconnect opening.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsi-Wen Tien, Chung-Ju Lee, Chih Wei Lu, Hsin-Chieh Yao, Yu-Teng Dai, Wei-Hao Liao
  • Publication number: 20240088022
    Abstract: Some embodiments relate to an integrated chip including a plurality of conductive structures over a substrate. A first dielectric layer is disposed laterally between the conductive structures. A spacer structure is disposed between the first dielectric layer and the plurality of conductive structures. An etch stop layer overlies the plurality of conductive structures. The etch stop layer is disposed on upper surfaces of the spacer structure and the first dielectric layer.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Inventors: Yu-Teng Dai, Chung-Ju Lee, Chih Wei Lu, Hsin-Chieh Yao, Hsi-Wen Tien, Wei-Hao Liao
  • Patent number: 11923293
    Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes a first interconnect dielectric layer arranged over a substrate. An interconnect wire extends through the first interconnect dielectric layer, and a barrier structure is arranged directly over the interconnect wire. The integrated chip further includes an etch stop layer arranged over the barrier structure and surrounds outer sidewalls of the barrier structure. A second interconnect dielectric layer is arranged over the etch stop layer, and an interconnect via extends through the second interconnect dielectric layer, the etch stop layer, and the barrier structure to contact the interconnect wire.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsin-Chieh Yao, Chung-Ju Lee, Chih Wei Lu, Hsi-Wen Tien, Wei-Hao Liao, Yu-Teng Dai
  • Patent number: 11915943
    Abstract: A semiconductor structure includes a conductive feature disposed over a semiconductor substrate, a via disposed in a first interlayer dielectric (ILD) layer over the conductive feature, and a metal-containing etch-stop layer (ESL) disposed on the via, where the metal-containing ESL includes a first metal and is resistant to etching by a fluorine-containing etchant. The semiconductor structure further includes a conductive line disposed over the metal-containing ESL, where the conductive line includes a second metal different from the first metal and is etchable by the fluorine-containing etchant, and where the via is configured to interconnect the conductive line to the conductive feature. Furthermore, the semiconductor structure includes a second ILD layer disposed over the first ILD layer.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: February 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Hao Liao, Hsi-Wen Tien, Chih Wei Lu, Pin-Ren Dai, Chung-Ju Lee
  • Patent number: 11676265
    Abstract: A method and an image processing device for mura detection on a display are proposed. The method includes the following steps. An original image of the display is received and segmented into region of interest (ROI) patches. A predetermined range of spatial frequency components are filtered out from the ROI patches to generate filtered ROI patches. A mura defect is identified from the display according to the filtered ROI patches and predetermined mura patterns.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: June 13, 2023
    Assignee: Novatek Microelectronics Corp.
    Inventors: Chih-Yu Chu, Po-Yuan Hsieh, Chieh-En Lee, Chung-Hao Tien, Shih-Hsuan Chen
  • Publication number: 20220036527
    Abstract: A method and an image processing device for mura detection on a display are proposed. The method includes the following steps. An original image of the display is received and segmented into region of interest (ROI) patches. A predetermined range of spatial frequency components are filtered out from the ROI patches to generate filtered ROI patches. A mura defect is identified from the display according to the filtered ROI patches and predetermined mura patterns.
    Type: Application
    Filed: July 31, 2020
    Publication date: February 3, 2022
    Applicant: Novatek Microelectronics Corp.
    Inventors: Chih-Yu Chu, Po-Yuan Hsieh, Chieh-En Lee, Chung-Hao Tien, Shih-Hsuan Chen
  • Patent number: 9113531
    Abstract: The method for mixing light of LED cluster is disclosed. Firstly, a plurality of LED cluster are provided, then the step is importing the related data, then the step for the continuous genetic algorithm and the merit function are respectively carried out, finally the step for exporting data is achieved. The applied field of the invention is able to comprise LED cluster, fluorescence light source array, and fluorescence lamp array, as well as the other light source field etc.
    Type: Grant
    Filed: June 1, 2012
    Date of Patent: August 18, 2015
    Assignee: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Chung-Hao Tien, Ming-Chin Chien, Song-Bor Chiang
  • Publication number: 20150029310
    Abstract: An active image acquisition system and method are introduced. The active image acquisition system retrieves light information of an object for creating an object model. The active image acquisition system includes a processing unit, a light-emitting unit and a capturing unit. The processing unit generates a plurality of modulating signals and a plurality of synchronous signals seriatim. The light emitting unit modulates a first light beam by the modulating signals, and the first light beam is emitted to the object. The object reflects a second light beam after the first light beam incident into the object with the light information. The capturing unit generates an image after capturing the second light beam in each modulating signals modulating the first light beam. The processing unit performs a first algorithm for calculating a plurality of the images and the modulating signals, and creating the object model.
    Type: Application
    Filed: January 10, 2014
    Publication date: January 29, 2015
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: CHUNG-HAO TIEN, SHENG-HSUN HSIEH, SHAO-HUNG HUANG
  • Patent number: 8729804
    Abstract: A switching module capable of adjusting a visual angle is disclosed. The switching module includes an edge-type optical substrate, a light source disposed by a side of the edge-type optical substrate, and an optical modulating component disposed between the light source and the edge-type optical substrate. The edge-type optical substrate has an emitting surface. The light source includes a plurality of light units. Each light unit can emit a beam to the edge-type optical substrate according to a predetermined angle. The optical modulating component can modulate divergence of the beam emitted from the light unit, so that the beam can be guided out of the edge-type optical substrate via the emitting surface according to the predetermined angle.
    Type: Grant
    Filed: August 20, 2012
    Date of Patent: May 20, 2014
    Assignee: Wistron Corporation
    Inventors: Chung-Hao Tien, Yu-Lin Tsai, Szu-Fen Chen, Hui-Chen Lin, Meng-Chao Kao
  • Patent number: 8602622
    Abstract: A backlight module may include an optical substrate, at least one light guide pipe, and at least one first light source. At least one accommodation trench is disposed on the optical substrate for accommodating the light guide pipe. The first light source is disposed at one side of the light guide pipe and is arranged for emitting at least one first light into the light guide pipe. The first light is transferred in the light guide pipe and leaves the light guide pipe when being reflected by the optical substrate.
    Type: Grant
    Filed: May 24, 2011
    Date of Patent: December 10, 2013
    Assignee: Acer Incorporated
    Inventors: Chung-Hao Tien, Chien-Hsiang Hung, Ming-Chin Chien, Chih-Hong Lin
  • Publication number: 20130320878
    Abstract: A switching module capable of adjusting a visual angle is disclosed. The switching module includes an edge-type optical substrate, a light source disposed by a side of the edge-type optical substrate, and an optical modulating component disposed between the light source and the edge-type optical substrate. The edge-type optical substrate has an emitting surface. The light source includes a plurality of light units. Each light unit can emit a beam to the edge-type optical substrate according to a predetermined angle. The optical modulating component can modulate divergence of the beam emitted from the light unit, so that the beam can be guided out of the edge-type optical substrate via the emitting surface according to the predetermined angle.
    Type: Application
    Filed: August 20, 2012
    Publication date: December 5, 2013
    Inventors: Chung-Hao Tien, Yu-Lin Tsai, Szu-Fen Chen, Hui-Chen Lin, Meng-Chao Kao
  • Publication number: 20130082622
    Abstract: The method for mixing light of LED cluster is disclosed. Firstly, a plurality of LED cluster are provided, then the step is importing the related data, then the step for the continuous genetic algorithm and the merit function are respectively carried out, finally the step for exporting data is achieved. The applied field of the invention is able to comprise LED cluster, fluorescence light source array, and fluorescence lamp array, as well as the other light source field etc.
    Type: Application
    Filed: June 1, 2012
    Publication date: April 4, 2013
    Applicant: National Chiao Tung University
    Inventors: Chung-Hao Tien, Ming-Chin Chien, Song-Bor Chiang
  • Publication number: 20120162765
    Abstract: The present invention provides an optical device having inhomogeneous polarization selectivity. The optical device includes a transparent substrate having a surface, a first optical element and a second optical element. The first and the second elements are disposed on the surface. The first optical element has a first polarization selectivity at least within a full visible frequency domain. The second optical element has a second polarization selectivity at least within a full visible frequency domain. The first and the second polarization selectivities have different orientations.
    Type: Application
    Filed: June 27, 2011
    Publication date: June 28, 2012
    Applicant: National Chiao Tung University
    Inventors: Chung-Hao Tien, Tzu-Hsiang Lan, Jie-En Li
  • Publication number: 20110299297
    Abstract: A backlight module may include an optical substrate, at least one light guide pipe, and at least one first light source. At least one accommodation trench is disposed on the optical substrate for accommodating the light guide pipe. The first light source is disposed at one side of the light guide pipe and is arranged for emitting at least one first light into the light guide pipe. The first light is transferred in the light guide pipe and leaves the light guide pipe when being reflected by the optical substrate.
    Type: Application
    Filed: May 24, 2011
    Publication date: December 8, 2011
    Inventors: Chung-Hao Tien, Chien-Hsiang Hung, Ming-Chin Chien, Chih-Hong Lin
  • Patent number: 7794129
    Abstract: The optical element apparatus for two-dimensional controllable localized partition backlight module is disclosed. The optical element apparatus comprises of a plurality of optical units which include a plurality of point light sources, light guides and collimating sheets. The point light source is located at the center of the light guide. The light guide includes the incident surface, the bottom place connecting with the light incident surface, and the light output surface. There are micro structures on the bottom place of the light guide and the top surface of the collimating sheet.
    Type: Grant
    Filed: December 26, 2007
    Date of Patent: September 14, 2010
    Assignee: National Chiao Tung University
    Inventors: Chung-Hao Tien, Yen-Hsing Lu, Yu-Kuo Cheng, Po-Yi Lu
  • Publication number: 20100085329
    Abstract: The present invention provides an optical touch display device, an optical touch sensing device, and a method for calculating a touch position. The optical touch sensing device can be detachably attached on a display panel using adhesive or other method. The present invention includes a first light source, a second light source, a light sensing element, and a processing unit. When an object blocks the path of light, some light sensing elements will receive some or no light. The processing unit will then compute two line segments based on the positions of light sensing elements receiving some or no light. The two line segments cross each other and their intersection is defined as the position of object or the touch position.
    Type: Application
    Filed: July 18, 2009
    Publication date: April 8, 2010
    Applicant: National Chiao Tung University
    Inventors: Ping-Chen Tseng, Chung-Hao Tien
  • Publication number: 20090168420
    Abstract: The optical element apparatus for two-dimensional controllable localized partition backlight module is disclosed. The optical element apparatus comprises of a plurality of optical units which include a plurality of point light sources, light guides and collimating sheets. The point light source is located at the center of the light guide. The light guide includes the incident surface, the bottom place connecting with the light incident surface, and the light output surface. There are micro structures on the bottom place of the light guide and the top surface of the collimating sheet.
    Type: Application
    Filed: December 26, 2007
    Publication date: July 2, 2009
    Applicant: National Chiao Tung University
    Inventors: Chung-Hao Tien, Yen-Hsing Lu, Yu-Kuo Cheng, Po-Yi Lu
  • Patent number: 6809886
    Abstract: The invention relates to an integrated method for manufacturing a combined solid immersion lens (SIL) and submicron aperture, and device thereof, comprising depositing a sacrificial layer on a substrate, coating a photoresist on the sacrificial layer and using photo-lithography to form an aperture on the photoresist, applying reflow and etching process to remove the sacrificial layer below the aperture, depositing a conductive material on the photoresist and performing electroplating to reduce the aperture size, then coating another photoresist and using photo-lithography to form a cylindrical phtoresist above the aperture, applying a high temperature thermal reflow to form a microlens, and finally removing the substrate to obtain an optical read/write apparatus with a combined solid immersion lens (SIL) and submicron aperture.
    Type: Grant
    Filed: June 25, 2003
    Date of Patent: October 26, 2004
    Assignee: National Chiao Tung University
    Inventors: Wensyang Hsu, Hsueh Liang Chou, Chung Hao Tien
  • Publication number: 20040136091
    Abstract: The invention relates to an integrated method for manufacturing a combined solid immersion lens (SIL) and submicron aperture, and device thereof, comprising depositing a sacrificial layer on a substrate, coating a photoresist on the sacrificial layer and using photo-lithography to form an aperture on the photoresist, applying reflow and etching process to remove the sacrificial layer below the aperture, depositing a conductive material on the photoresist and performing electroplating to reduce the aperture size, then coating another photoresist and using photo-lithography to form a cylindrical phtoresist above the aperture, applying a high temperature thermal reflow to form a microlens, and finally removing the substrate to obtain an optical read/write apparatus with a combined solid immersion lens (SIL) and submicron aperture.
    Type: Application
    Filed: June 25, 2003
    Publication date: July 15, 2004
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Wensyang Hsu, Hsueh Liang Chou, Chung Hao Tien