Abstract: A high speed code processing system for error correcting code is disclosed. It uses bit parallel residue generation for cyclic codes. This minimizes the time delay for cyclic code processing. Residue generation of the bit string is accomplished by processing multiple bits in each clock time instead of the conventional bit-by-bit implementation. Thus, the checkword calculation and the syndrome calculation are accomplished at a significantly higher speed than the conventional shift register approach to provide a system capable of on-line residue generation.