Patents by Inventor Chung-Ho Lim

Chung-Ho Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190070988
    Abstract: Provided are a vehicle seat for preventing formation of wrinkles and a method of manufacturing the same, and more particularly, a vehicle seat for preventing formation of wrinkles, whereby a backing cloth between a first foam layer and a second foam layer is bonded using a double flame lamination method so that the first foam layer is freely moved and simultaneously wrinkles can be prevented from being formed on a surface of the vehicle seat, and a method of manufacturing the same.
    Type: Application
    Filed: September 14, 2017
    Publication date: March 7, 2019
    Applicant: S&B CO.,LTD.
    Inventors: Jae Keun SUNG, Jong Hee PARK, Chong Hoon LEE, Jin Bae CHO, Man Ho LEE, Chung Ho LIM
  • Publication number: 20060154439
    Abstract: In a method of fabricating a semiconductor device, trenches are formed defining active regions at predetermined portions of a semiconductor substrate. A thermal oxide layer and a liner layer are sequentially formed covering inner walls of the trenches and upper surfaces of the active regions. Device isolation patterns are formed filling the trenches, in which the liner layer is formed, and an upper portion of the liner layer at the upper portions of the active regions are exposed. The exposed liner layer is dry etched to expose an upper portion of the thermal oxide layer at the upper portions of the active regions. The exposed thermal oxide layer is etched to expose the upper surfaces of the active regions.
    Type: Application
    Filed: January 12, 2006
    Publication date: July 13, 2006
    Inventor: Chung-Ho Lim
  • Patent number: 6991993
    Abstract: The present invention provides a method of fabricating trench isolation structures of a semiconductor device. A conformal trench filler insulation layer is formed to fill wide and narrow trenches in a substrate. A portion of the trench filler insulation layer filling the wide trench is then removed. Next, a trench protection layer is formed on the trench filler insulation layer. The resultant structure is planarized to leave the trench protection layer over the wide width trench. Another planarization process is then carried out using the etch mask pattern and the remaining trench protection layer as a planarization stopper. Accordingly, the device isolation layer will attain a uniform planarity irrespective of the various widths of the trenches.
    Type: Grant
    Filed: January 7, 2004
    Date of Patent: January 31, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Hun Park, Chung-Ho Lim, Sung-Gyu Park
  • Publication number: 20040147091
    Abstract: The present invention provides a method of fabricating trench isolation structure of a semiconductor device. A conformal trench filler insulation layer is formed to fill wide and narrow trenches in a substrate. A portion of the trench filler insulation layer filling the wide trench is then removed. Next, a trench protection layer is formed on the trench filler insulation layer. The resultant structure is planarized to leave the trench protection layer over the wide width trench. Another planarization process is then carried out using the etch mask pattern and the remaining trench protection layer as a planarization stopper. Accordingly, the device isolation layer will attain a uniform planarity irrespective of the various widths of the trenches.
    Type: Application
    Filed: January 7, 2004
    Publication date: July 29, 2004
    Inventors: Sang-Hun Park, Chung-Ho Lim, Sung-Gyu Park