Patents by Inventor Chung Hong
Chung Hong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12189558Abstract: In various examples, methods may include receiving first data transmitted from a second component and second data transmitted from the second component during a first time period. The first data may be transmitted via a first data lane and the second data may be transmitted via a second data lane. The method may include receiving de-skew symbols at an interval from the second component via the first data lane and via the second data lane during the first time period. The method may include compensating for a first skew introduced to a first propagation of the first data across the first data lane and a second skew introduced to a second propagation of the second data across the second data lane using the de-skew symbols received during the first time period.Type: GrantFiled: July 15, 2022Date of Patent: January 7, 2025Assignee: NVIDIA CORPORATIONInventors: Padmanabham Patki, Nisha Bhushan, Kiran Kumar Dash, Arpit Gupta, Chung-Hong Lai, Michael Alan Ditty
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Patent number: 12189460Abstract: An error detection and correction method is provided. The method includes: when a pipeline stage error is detected, correcting the pipeline stage error; when it is determined that a plurality of cascaded pipeline stage circuits have continuous pipeline stage errors, stopping all operations of all pipeline stage circuits; flushing the data of the pipeline stage circuits; and re-processing the data of the pipeline stage circuits at a downclocked frequency.Type: GrantFiled: July 6, 2022Date of Patent: January 7, 2025Assignee: UPBEAT TECHNOLOGY Co., LtdInventors: Chung-Chieh Chen, Da-Ming Chiang, Shuo-Hong Hung, Bing-Chen Wu
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Patent number: 12187806Abstract: The present invention relates to a novel antibody, an antigen-binding fragment thereof and the uses of the antibody and fragment, wherein the antibody and the fragment comprise specific complementarity-determining regions (CDRs) and/or specifically bind to human CD73 at specific epitopes.Type: GrantFiled: March 4, 2022Date of Patent: January 7, 2025Assignee: DEVELOPMENT CENTER FOR BIOTECHNOLOGYInventors: Chun-Chung Lee, Yu-Hsun Lo, Chu-Bin Liao, Chen-Jei Hong, Sih-Yu Chen, Yen-Yu Wu, Szu-Liang Lai, Chih-Yung Hu, Wen-Bin Ke, Ya-Ting Juan, Kao-Jean Huang
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Publication number: 20240423928Abstract: A pharmaceutical composition for treating neurodegenerative diseases of the brain is provided and including cells encapsulated by microtubular array membranes (MTAMs). The material of the microtubular array membrane is Polysulfone (PSF) or PLGA-PLLA copolymer. The cells include hybridoma cells capable of secreting anti-Tau antibodies or human umbilical cord mesenchymal stem cells (hUC-MSCs). The pharmaceutical composition could be implanted into a living body for treating neurodegenerative diseases of the brain in a subject in need thereof, in order to improve the cognitive dysfunction.Type: ApplicationFiled: June 18, 2024Publication date: December 26, 2024Inventors: Chi-Yuan CHIU, Chien-Tai HONG, Chaur-Jong HU, Chien-Chung CHEN, Shu-Mei CHEN, Lung CHAN, Wan-Ting HUANG, Chee-Ho CHEW
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Publication number: 20240411051Abstract: A light-emitting device array includes a first light-emitting device, a second light-emitting device, and a third light-emitting device. A first beam shaping structure of the first light-emitting device is configured to convert light emitted by a first light-emitting structure of first light-emitting device into first structured light. A second beam shaping structure of the second light-emitting device is configured to convert light emitted by a second light-emitting structure of second light-emitting device into second structured light. Speckle patterns and spatial distributions of the first structured light and the second structured light on a projection plane are the same. A third beam shaping structure of the third light-emitting device is configured to convert light emitted by a third light-emitting structure of third light-emitting device into third structured light.Type: ApplicationFiled: September 7, 2023Publication date: December 12, 2024Inventors: Jun-Da CHEN, Yu-Heng HONG, Wen-Cheng HSU, Tzu-Hsiang LAN, Hao-Chung KUO
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Publication number: 20240405885Abstract: An optical detection system includes a first optical transmitter module, a first optical receiver module, a second optical receiver module, and a second optical transmitter module. The first optical transmitter module is configured to emit detection light. A first light transmitter of the first optical transmitter module includes a photonic crystal surface emitting laser. A first metasurface of the first optical transmitter module is located above the first light transmitter. The second optical receiver module is configured to receive first communication light. The second communication light has information of signal light and information in first communication light. A second light transmitter of the second optical transmitter module includes a photonic crystal surface emitting laser. A second metasurface of the second optical transmitter module is located above the second light transmitter.Type: ApplicationFiled: August 23, 2023Publication date: December 5, 2024Inventors: Jun-Da CHEN, Yu-Heng HONG, Fu-He HSIAO, Kuo-Fong TSENG, Hao-Chung KUO
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Publication number: 20240396564Abstract: A Successive Approximation Register Analog-to-Digital Converter (SAR ADC) comprises: a plurality of switch capacitor arrays, used to sample an analog input signal; a noise shaping circuit including a fourth-order CIFF (Cascade of Integrators with Feed-Forward) loop filter having two second-order cascaded CIFF loop filters, in the fourth-order CIFF loop filter, a first-order extraction capacitor and a second-order extraction capacitor sharing a first amplifier, and a third-order extraction capacitor and a fourth-order extraction capacitor sharing a second amplifier; a comparator for comparing a plurality of output signals from the noise shaping circuit to produce a plurality of comparison results; and a logic circuit for generating a digital output signal and controlling the switch capacitor arrays based on comparison results from the comparator.Type: ApplicationFiled: November 30, 2023Publication date: November 28, 2024Inventors: Chung-Chieh CHEN, Shuo-Hong Hung, Kai-Cheng Cheng, Soon-Jyh Chang
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Publication number: 20240379552Abstract: Various layouts for conductive interconnects in the conductor layers in an integrated circuit are disclosed. Some or all of the conductive interconnects are included in a power delivery system. In general, the conductive interconnects in a first conductor layer are arranged according to an orthogonal layout and the conductive interconnects in a second conductor layer are arranged according to a non-orthogonal layout. Conductive stripes in a transition conductor layer positioned between the first and the second conductor layers electrically connect the conductive interconnects in the first conductor layer to the conductive interconnects in the second conductor layer.Type: ApplicationFiled: July 23, 2024Publication date: November 14, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wan-Yu LO, Chung-Hsing WANG, Chin-Shen LIN, Kuo-Nan YANG, Meng-Xiang LEE, Hao-Tien KAN, Jhih-Hong YE
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Publication number: 20240373680Abstract: A display device includes: a base layer; a light emitting element on the base layer, and including a first electrode, an intermediate layer on the first electrode, and a second electrode on the intermediate layer; a pixel definition film on the first electrode, and having a light emitting opening exposing a portion of the first electrode; a separator on the pixel definition film, and disconnecting the second electrode; and an encapsulation layer on the pixel definition film, and including: a first encapsulation layer including a first sub-layer covering the separator, a second sub-layer on the first sub-layer, and a third sub-layer on the second sub-layer; a second encapsulation layer on the first encapsulation layer, and including an organic material; and a third encapsulation layer on the second encapsulation layer, and including an inorganic material. At least one of the first sub-layer or the second sub-layer includes an organic material.Type: ApplicationFiled: March 18, 2024Publication date: November 7, 2024Inventors: SUNHO KIM, YOOMIN KO, Hyewon KIM, JUCHAN PARK, PILSUK LEE, CHUNG SOCK CHOI, SUNGJIN HONG
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Patent number: 12125443Abstract: A display panel includes a first display area and a second display area. A plurality of base pixel parts are disposed in the second display area, and each base pixel part includes “k” first color light emitting elements. A controller receives image signals, and the image signals include first image signals corresponding to the first display area and second image signals corresponding to the second display area. The second image signals are divided into a plurality of base signal parts respectively corresponding to the plurality of base pixel parts, and each base signal part includes “m*n” first color image signals. The controller generates color image data by rendering “p” color image signals of “m*n” color image signals included in a corresponding base signal part and “(m*n)?p” referenced image signals included in a referenced signal part adjacent to the corresponding base signal part.Type: GrantFiled: November 7, 2022Date of Patent: October 22, 2024Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Sungjin Hong, Chung Sock Choi, Hyewon Kim, Yoomin Ko, Sunho Kim, Juchan Park, Pilsuk Lee
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Publication number: 20240339503Abstract: An epitaxial wafer is disclosed. The epitaxial wafer includes a substrate; and a stack structure disposed on the substrate, wherein the stack structure includes first and second layers alternately stacked on top of each other, wherein the first layer is made of a compound represented by one selected from a group consisting of following Chemical Formulas 1-1 to 1-5, wherein the second layer is made of a compound represented by a following Chemical Formula 2: Si1-xGex(m?x?1.0)??[Chemical Formula 1-1] Si1-x-yGexBy(m?x<1.0,0<y?0.4,0.2<x+y?1.0)??[Chemical Formula 1-2] Si1-x-zGexPz(m?x<1.0,0<z?0.4,0.2<x+z?1.0)??[Chemical Formula 1-3] Si1-x-zGexCz(m?x<1.0,0<z?0.4,0.2<x+z?1.0)??[Chemical Formula 1-4] Si1-x-y-zGexByPz(0.2<x<1.0,0<y?0.4,0<z?0.4,0.2<x+y+z?1.Type: ApplicationFiled: April 2, 2024Publication date: October 10, 2024Applicant: UIF (University Industry Foundation), Yonsei UniversityInventors: Dae Hong KO, Chung Hee CHO, Ki Seok LEE, Dong Min YOON
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Patent number: 12107048Abstract: Various layouts for conductive interconnects in the conductor layers in an integrated circuit are disclosed. Some or all of the conductive interconnects are included in a power delivery system. In general, the conductive interconnects in a first conductor layer are arranged according to an orthogonal layout and the conductive interconnects in a second conductor layer are arranged according to a non-orthogonal layout. Conductive stripes in a transition conductor layer positioned between the first and the second conductor layers electrically connect the conductive interconnects in the first conductor layer to the conductive interconnects in the second conductor layer.Type: GrantFiled: January 18, 2023Date of Patent: October 1, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Wan-Yu Lo, Chung-Hsing Wang, Chin-Shen Lin, Kuo-Nan Yang, Meng-Xiang Lee, Hao-Tien Kan, Jhih-Hong Ye
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Publication number: 20240324358Abstract: A display panel is provided. The display panel includes a light emitting portion including an anode, a cathode, and an organic layer disposed between the anode and the cathode and that emits light. The display panel further includes a pixel driver electrically connected to the light emitting portion, and including a first transistor, a connection wire disposed on a layer different than the first transistor, and electrically connecting the light emitting portion and the pixel driver, and a conductive pattern disposed between the first transistor and the light emitting portion. The conductive pattern overlaps at least a portion of the anode and at least a portion of a gate of the first transistor in a plan view.Type: ApplicationFiled: March 15, 2024Publication date: September 26, 2024Applicant: Samsung Display Co., Ltd.Inventors: PILSUK LEE, YOOMIN KO, SUNHO KIM, Hyewon KIM, JUCHAN PARK, CHUNG SOCK CHOI, SUNGJIN HONG
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Patent number: 12094641Abstract: The invention provides a two-sided auxiliary structure for induction cards, which comprises: a metal shield layer; and two high-conductivity magnetic layers, which are respectively set on two opposite sides of the metal shield layer, wherein the area of the metal shield layer is greater than those of the two high-conductivity magnetic layers. The two-sided auxiliary structure for induction cards of the invention improves the problem of poor induction success rate of plural induction cards.Type: GrantFiled: August 17, 2021Date of Patent: September 17, 2024Assignee: FOURTEEN DESIGN COMPANY LIMITEDInventors: Ming-Hong Yeh, Chung-Ping Lai, Wan-Chi Chang, Kung-Ting Tsai
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Publication number: 20240297482Abstract: A laser module includes a substrate, a laser unit, an optical amplification unit, a high reflection layer and a low reflection layer. The laser unit is disposed on the substrate and configured to generate a laser light. The optical amplification unit is disposed on the substrate. An optical channel of the optical amplification unit is communicated with an optical channel of the laser unit. An electrode of the optical amplification unit is electrically isolated from an electrode of the laser unit. The high reflection layer is disposed on an end of the laser unit away from the optical amplification unit. The low reflection layer is disposed on an end of the optical amplification unit away from the laser unit. The laser light and a gain light are emitted to an outside of the laser module via the low reflection layer. A method for manufacturing the laser module is also provided.Type: ApplicationFiled: December 7, 2023Publication date: September 5, 2024Inventors: PO-HONG CHEN, YI-JEN CHIU, KUAN-YU CHEN, CHUNG-WEI HSIAO
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Patent number: 12080230Abstract: A display panel including a transistor, a light-emitting element including a first electrode, a light emitting layer disposed on the first electrode, and a second electrode disposed on the light emitting layer, the second electrode being electrically connected to the transistor, an insulating layer disposed between the transistor and the light-emitting element, and connection wiring.Type: GrantFiled: October 23, 2023Date of Patent: September 3, 2024Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Juchan Park, Yoomin Ko, Sunho Kim, Hyewon Kim, Pilsuk Lee, Chung Sock Choi, Sungjin Hong
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Publication number: 20240290267Abstract: A display device including a base layer, a plurality of voltage lines and a transistor that are disposed on the base layer, a light emitting element electrically connected to the transistor and including a cathode, and a connection wiring line electrically connected to the light emitting element and including a first connection part spaced apart from a light emitting opening defined in the light emitting element, and a second connection part electrically connected to the transistor. The first connection part overlaps some of the plurality of voltage lines in plan view.Type: ApplicationFiled: February 23, 2024Publication date: August 29, 2024Applicant: Samsung Display Co., Ltd.Inventors: JUCHAN PARK, YOOMIN KO, SUNHO KIM, Hyewon KIM, Yerim SON, PILSUK LEE, CHUNG SOCK CHOI, SUNGJIN HONG
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Publication number: 20240292677Abstract: A display device includes a display element layer including a plurality of light emitting portions, and a partition structure for separating the light emitting portions, and a circuit layer including a plurality of transistors, a first insulation layer on the transistors and having a plurality of first holes not overlapping the light emitting portions, a second insulation layer on the first insulation layer and having a plurality of second holes not overlapping the first holes, and a plurality of connection wiring portions for electrically connecting the light emitting portions and the transistors, and which includes extension wiring respectively connecting the light emitting portions and the transistors.Type: ApplicationFiled: February 22, 2024Publication date: August 29, 2024Inventors: PILSUK LEE, YOOMIN KO, SUNHO KIM, Hyewon KIM, JUCHAN PARK, CHUNG SOCK CHOI, SUNGJIN HONG
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Publication number: 20240020255Abstract: In various examples, methods may include receiving first data transmitted from a second component and second data transmitted from the second component during a first time period. The first data may be transmitted via a first data lane and the second data may be transmitted via a second data lane. The method may include receiving de-skew symbols at an interval from the second component via the first data lane and via the second data lane during the first time period. The method may include compensating for a first skew introduced to a first propagation of the first data across the first data lane and a second skew introduced to a second propagation of the second data across the second data lane using the de-skew symbols received during the first time period.Type: ApplicationFiled: July 15, 2022Publication date: January 18, 2024Inventors: Padmanabham Patki, Nisha Bhushan, Kiran Kumar Dash, Arpit Gupta, Chung-Hong Lai, Michael Alan Ditty
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Publication number: 20230392136Abstract: A membranous immobilized cell, polypeptide, oligopeptide or protein and a preparation method thereof are provided. The method includes the following steps: 1) providing un-film-form chitosan, where the chitosan is un-pre-crosslinked or pre-crosslinked; 2) providing a mixture of the un-film-form chitosan and cell, polypeptide, oligopeptide or protein, and in the mixture, the un-film-form chitosan is in a dissolved state; 3) mixing the mixture with a crosslinking reagent to obtain a co-crosslinked product of the chitosan and the cell, polypeptide, oligopeptide or protein; and 4) drying the co-crosslinked product to obtain membranous immobilized cell, polypeptide, oligopeptide or protein. When un-pre-crosslinked chitosan is used in the step 1), the method further includes comprises the step 5) mixing the membranous immobilized cell, polypeptide, oligopeptide or protein with phosphate salt, so that chitosan molecules therein are crosslinked with each other.Type: ApplicationFiled: November 12, 2021Publication date: December 7, 2023Inventors: Chung Hong CHEUNG, Jun WANG