Patents by Inventor Chung-Hong Lai

Chung-Hong Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240020255
    Abstract: In various examples, methods may include receiving first data transmitted from a second component and second data transmitted from the second component during a first time period. The first data may be transmitted via a first data lane and the second data may be transmitted via a second data lane. The method may include receiving de-skew symbols at an interval from the second component via the first data lane and via the second data lane during the first time period. The method may include compensating for a first skew introduced to a first propagation of the first data across the first data lane and a second skew introduced to a second propagation of the second data across the second data lane using the de-skew symbols received during the first time period.
    Type: Application
    Filed: July 15, 2022
    Publication date: January 18, 2024
    Inventors: Padmanabham Patki, Nisha Bhushan, Kiran Kumar Dash, Arpit Gupta, Chung-Hong Lai, Michael Alan Ditty
  • Publication number: 20230273873
    Abstract: In various examples, a diagnostic circuit is connected to a target system to automatically trigger the target system to enter a diagnostic mode. The diagnostic circuit receives diagnostic data from the target system when the target system performs a diagnostic operation in the diagnostic mode.
    Type: Application
    Filed: February 28, 2022
    Publication date: August 31, 2023
    Inventors: Padmanabham Patki, Jue Wu, Chung-Hong Lai, Laurent Dahan, Marc Delvaux, Chiang Hsu
  • Patent number: 9223708
    Abstract: A system, method, and computer program product are provided for utilizing a data pointer table pre-fetcher. In use, an assembly of a data pointer table within a main memory is identified. Additionally, the data pointer table is pre-fetched from the main memory. Further, data is sampled from the pre-fetched data pointer table. Further still, the sampled data is stored within a data pointer table cache.
    Type: Grant
    Filed: November 15, 2013
    Date of Patent: December 29, 2015
    Assignee: NVIDIA Corporation
    Inventors: PrasannaKumar Shripal Kole, Chung-Hong Lai, Rahul Jain
  • Publication number: 20150143058
    Abstract: A system, method, and computer program product are provided for utilizing a data pointer table pre-fetcher. In use, an assembly of a data pointer table within a main memory is identified. Additionally, the data pointer table is pre-fetched from the main memory. Further, data is sampled from the pre-fetched data pointer table. Further still, the sampled data is stored within a data pointer table cache.
    Type: Application
    Filed: November 15, 2013
    Publication date: May 21, 2015
    Applicant: NVIDIA Corporation
    Inventors: PrasannaKumar Shripal Kole, Chung-Hong Lai, Rahul Jain
  • Publication number: 20140129742
    Abstract: A technique for controlling (e.g. (re)setting, adjusting, fixing, increasing, decreasing, determining, monitoring, calculating, measuring, storing) a holding time of a request from a controller of a host device to an endpoint of a peripheral device across a universal serial bus reduces power and memory loss and enhances overall system performance. The host device may include a programmable and/or hardwired controller for controlling the amount of time before the request from the host device is initially sent and/or resent to the endpoint of the peripheral device across the universal serial bus.
    Type: Application
    Filed: November 8, 2012
    Publication date: May 8, 2014
    Applicant: NVIDIA CORPORATION
    Inventors: Chung-Hong Lai, Krishnaraj S. Rao, Rahul Jain
  • Patent number: 7793024
    Abstract: A method for command transmission between systems is introduced. The command transmission between the systems, such as a north bridge chip, a south bridge chip and a central processing unit (CPU), employs the signals transmission specified by a PCI Express bus originally for the communication between system chips or peripheral devices. The signals transmission includes an interrupt or a system management instruction specified by the PCI Express bus, which further defines the specific addresses of a memory packet and a system message packet. In the preferred embodiment, the method thereof comprises the steps of transmitting an INTA command first, then a second system chip upstreams an INTR/system-management command to a first system chip. After that, the first system chip downstreams an EOI/system-management command to the second system chip.
    Type: Grant
    Filed: June 20, 2006
    Date of Patent: September 7, 2010
    Assignee: NVIDIA Corporation
    Inventors: Chang-Guang Lin, Chung-Hong Lai, You-Cheng Luo
  • Patent number: 7469349
    Abstract: A computer system and a method of signal transmission via a PCI-Express bus is provided for transmitting a power-saving signal among a plurality of peripheral devices. For the peripheral devices coupled with the system chips can enter a power-saving mode successfully, a signal snooping and blocking manners are introduced into the system chips. The present invention is to improve on a problem that the system chips cannot enter the power-saving mode simultaneously since the system chips don't set any power-management unit therein.
    Type: Grant
    Filed: December 23, 2005
    Date of Patent: December 23, 2008
    Assignee: NVIDIA Corporation
    Inventors: Chih-Cheng Han, Ming-Jiun Chang, Hsuan-Ching Chao, Chung-Hong Lai
  • Patent number: 7467308
    Abstract: A PCI-Express bus is incorporated in a method for transmitting a power-saving command between a computer system and its plurality of peripheral devices of the present invention. More particularly, a specific power management command is introduced into the signal transmission protocol of a system command, which is transmitted between the plural system chips. Therefore, the peripheral devices coupled with the system chips can enter a certain power mode simultaneously. The present invention is used to solve the problem of the peripheral devices cannot enter the certain power mode since the system chip has no power management unit disposed under the PCI-Express structure.
    Type: Grant
    Filed: December 23, 2005
    Date of Patent: December 16, 2008
    Assignee: NVIDIA Corporation
    Inventors: Ming-Jiun Chang, Chih-Cheng Han, Hsuan-Ching Chao, Chung-Hong Lai
  • Patent number: 7467313
    Abstract: A method for transmitting a power-saving command between a computer system and system chips thereof is described. A power-saving command associated with a first system chip is introduced to the computer system since a BIOS is modified therefore. The CPU of the computer system determines the power mode of the first system chip according to a register therein. As the first system chip enters the power-saving mode, the second system chip is informed entering the power-saving mode as well. Therefore, the peripheral devices coupled to the system chips can enter the power-saving mode smoothly so as to solve that the devices cannot enter the mode simultaneously since there is no power management unit (PMU) installed in the first system chip.
    Type: Grant
    Filed: December 23, 2005
    Date of Patent: December 16, 2008
    Assignee: NVIDIA Corporation
    Inventors: Chih-Cheng Han, Ming-Jiun Chang, Hsuan-Ching Chao, Chung-Hong Lai
  • Publication number: 20070293984
    Abstract: A method for command transmission between systems is introduced. The command transmission between the systems, such as a north bridge chip, a south bridge chip and a central processing unit (CPU), employs the signals transmission specified by a PCI Express bus originally for the communication between system chips or peripheral devices. The signals transmission includes an interrupt or a system management instruction specified by the PCI Express bus, which further defines the specific addresses of a memory packet and a system message packet. In the preferred embodiment, the method thereof comprises the steps of transmitting an INTA command first, then a second system chip upstreams an INTR/system-management command to a first system chip. After that, the first system chip downstreams an EOI/system-management command to the second system chip.
    Type: Application
    Filed: June 20, 2006
    Publication date: December 20, 2007
    Inventors: Chang-Guang Lin, Chung-Hong Lai, You-Cheng Luo
  • Publication number: 20060236139
    Abstract: A PCI-Express bus is incorporated in a method for transmitting a power-saving command between a computer system and its plurality of peripheral devices of the present invention. More particularly, a specific power management command is introduced into the signal transmission protocol of a system command, which is transmitted between the plural system chips. Therefore, the peripheral devices coupled with the system chips can enter a certain power mode simultaneously. The present invention is used to solve the problem of the peripheral devices cannot enter the certain power mode since the system chip has no power management unit disposed under the PCI-Express structure.
    Type: Application
    Filed: December 23, 2005
    Publication date: October 19, 2006
    Inventors: Ming-Jiun Chang, Chih-Cheng Han, Hsuan-Ching Chao, Chung-Hong Lai
  • Publication number: 20060212734
    Abstract: A method for transmitting a power-saving command between a computer system and system chips thereof is described. A power-saving command associated with a first system chip is introduced to the computer system since a BIOS is modified therefore. The CPU of the computer system determines the power mode of the first system chip according to a register therein. As the first system chip enters the power-saving mode, the second system chip is informed entering the power-saving mode as well. Therefore, the peripheral devices coupled to the system chips can enter the power-saving mode smoothly so as to solve that the devices cannot enter the mode simultaneously since there is no power management unit (PMU) installed in the first system chip.
    Type: Application
    Filed: December 23, 2005
    Publication date: September 21, 2006
    Inventors: Chih-Cheng Han, Ming-Jiun Change, Hsuan-Ching Chao, Chung-Hong Lai
  • Publication number: 20060212731
    Abstract: A computer system and a method of signal transmission via a PCI-Express bus is provided for transmitting a power-saving signal among a plurality of peripheral devices. For the peripheral devices coupled with the system chips can enter a power-saving mode successfully, a signal snooping and blocking manners are introduced into the system chips. The present invention is to improve on a problem that the system chips cannot enter the power-saving mode simultaneously since the system chips don't set any power-management unit therein.
    Type: Application
    Filed: December 23, 2005
    Publication date: September 21, 2006
    Inventors: Chih-Cheng Han, Ming-Jiun Chang, Hsuan-Ching Chao, Chung-Hong Lai