Patents by Inventor Chung-Hsi J. Wu

Chung-Hsi J. Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7859645
    Abstract: Lithography masks and methods of manufacture thereof are disclosed. A preferred embodiment includes a method of generating an assist feature of a lithography mask. The method includes providing a layout for a material layer of a semiconductor device, the layout including a pattern for at least one feature of the semiconductor device. The method includes forming an assist feature in the pattern for the at least one feature, wherein the assist feature extends completely through the pattern for the at least one feature.
    Type: Grant
    Filed: November 25, 2009
    Date of Patent: December 28, 2010
    Assignee: Infineon Technologies AG
    Inventors: Uwe Paul Schroeder, Chung-Hsi J. Wu
  • Publication number: 20100073648
    Abstract: Lithography masks and methods of manufacture thereof are disclosed. A preferred embodiment includes a method of generating an assist feature of a lithography mask. The method includes providing a layout for a material layer of a semiconductor device, the layout including a pattern for at least one feature of the semiconductor device. The method includes forming an assist feature in the pattern for the at least one feature, wherein the assist feature extends completely through the pattern for the at least one feature.
    Type: Application
    Filed: November 25, 2009
    Publication date: March 25, 2010
    Inventors: Uwe Paul Schroeder, Chung-Hsi J. Wu
  • Patent number: 7648805
    Abstract: Lithography masks and methods of manufacture thereof are disclosed. A preferred embodiment includes a method of generating an assist feature of a lithography mask. The method includes providing a layout for a material layer of a semiconductor device, the layout including a pattern for at least one feature of the semiconductor device. The method includes forming an assist feature in the pattern for the at least one feature, wherein the assist feature extends completely through the pattern for the at least one feature.
    Type: Grant
    Filed: December 6, 2006
    Date of Patent: January 19, 2010
    Assignees: International Business Machines Corporation, Infineon Technologies AG
    Inventors: Uwe Paul Schroeder, Chung-Hsi J. Wu
  • Patent number: 7407736
    Abstract: Methods for improving a single layer resist (SLR) patterning scheme, and in particular, its SLR layer and anti-reflective coating (ARC) etch selectivity, are disclosed. In one method, a patterned SLR layer over an anti-reflective coating (ARC) is provided and at least a portion of the patterned SLR layer and a portion of the ARC are exposed to radiation. The radiation may include, for example, an electron beam or an ion beam. The radiation exposure selectively breaks the polymer chains of the ARC and reduces the thickness of the ARC due to the loss of volatile function groups and free volume. As a result, the etch rate of the ARC is increased due to the conversion from polymer to monomer. Therefore, less resist will be consumed during, for example, an ARC open etch.
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: August 5, 2008
    Assignee: International Business Machines Corporation
    Inventors: Kuang-Jung J. Chen, Wu-Song S. Huang, Chung-Hsi J. Wu
  • Publication number: 20080138588
    Abstract: Lithography masks and methods of manufacture thereof are disclosed. A preferred embodiment includes a method of generating an assist feature of a lithography mask. The method includes providing a layout for a material layer of a semiconductor device, the layout including a pattern for at least one feature of the semiconductor device. The method includes forming an assist feature in the pattern for the at least one feature, wherein the assist feature extends completely through the pattern for the at least one feature.
    Type: Application
    Filed: December 6, 2006
    Publication date: June 12, 2008
    Inventors: Uwe Paul Schroeder, Chung-Hsi J. Wu
  • Publication number: 20080057443
    Abstract: Methods for improving a single layer resist (SLR) patterning scheme, and in particular, its SLR layer and anti-reflective coating (ARC) etch selectivity, are disclosed. In one method, a patterned SLR layer over an anti-reflective coating (ARC) is provided and at least a portion of the patterned SLR layer and a portion of the ARC are exposed to radiation. The radiation may include, for example, an electron beam or an ion beam. The radiation exposure selectively breaks the polymer chains of the ARC and reduces the thickness of the ARC due to the loss of volatile function groups and free volume. As a result, the etch rate of the ARC is increased due to the conversion from polymer to monomer. Therefore, less resist will be consumed during, for example, an ARC open etch.
    Type: Application
    Filed: January 31, 2006
    Publication date: March 6, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kuang-Jung J. Chen, Wu-Song S. Huang, Chung-Hsi J. Wu
  • Patent number: 7074525
    Abstract: Non-uniformity and image shortening are substantially reduced in an image printed on a substrate using a photolithographic mask in which the mask pattern includes at least one lines and spaces array adjacent to at least one clear region. At least one line feature is incorporated within the clear region of the mask pattern and is disposed in proximity to the lines and spaces array. The line feature has a line width that is smaller than a minimum resolution of the optical projection system. The image is printed by illuminating the photolithographic mask and projecting light transmitted through the photolithographic mask onto the substrate using the optical projection system.
    Type: Grant
    Filed: April 29, 2003
    Date of Patent: July 11, 2006
    Assignees: Infineon Technologies AG, International Business Machines Corporation
    Inventors: Chung-Hsi J. Wu, Timothy Allan Brunner, Shahid Butt, Patrick Speno
  • Publication number: 20040219435
    Abstract: Non-uniformity and image shortening are substantially reduced in an image printed on a substrate using a photolithographic mask in which the mask pattern includes at least one lines and spaces array adjacent to at least one clear region. At least one line feature is incorporated within the clear region of the mask pattern and is disposed in proximity to the lines and spaces array. The line feature has a line width that is smaller than a minimum resolution of the optical projection system. The image is printed by illuminating the photolithographic mask and projecting light transmitted through the photolithographic mask onto the substrate using the optical projection system.
    Type: Application
    Filed: April 29, 2003
    Publication date: November 4, 2004
    Applicants: Infineon Technologies North America Corp., International Business Machines Corporation
    Inventors: Chung-Hsi J. Wu, Timothy Allan Brunner, Shahid Butt, Patrick Speno