Patents by Inventor Chung-Hsien Chen

Chung-Hsien Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230024259
    Abstract: A wafer backside defect detection method and a wafer backside defect detection apparatus are provided. The wafer backside defect detection method includes the following steps. A peripheral edge area of a wafer backside image that at least one notch is located is cropped off. Adjacent white pixels on the wafer backside image are connected to obtain a plurality of abnormal regions. If a total area of top N of the abnormal regions is more than 10% of an area of the wafer, it is deemed that the wafer has a roughness defect. N is a natural number. If the total area of the top N of the abnormal regions is less than 1% of the area of the wafer and a largest abnormal region of the abnormal regions is longer than a predetermined length, it is deemed that the wafer has a scratch defect.
    Type: Application
    Filed: July 20, 2021
    Publication date: January 26, 2023
    Inventors: Cheng-Hsien CHEN, Chia-Feng HSIAO, Chung-Hsuan WU, Chen-Hui HUANG, Nai-Ying LO, En-Wei TSUI, Yung-Yu YANG, Chen-Hsuan HUNG
  • Publication number: 20220398582
    Abstract: An information delivery method for transferring fund is provided. The information delivery method includes receiving payment information, determining whether a transfer condition is met according to the payment information, in response to determining that the transfer condition is met, obtaining source account information of a source entity and destination account information of a destination entity in the payment information, determining a transfer path according to the source account information of the source entity and the destination account information of the destination entity, and transmitting the payment information from the source entity to the destination entity according to the transfer path.
    Type: Application
    Filed: June 11, 2021
    Publication date: December 15, 2022
    Applicant: OBOOK INC.
    Inventors: Chun-Kai Wang, Chung-Han Hsieh, Chih-Yang Liu, Wei-Te Lin, I-Cheng Lin, Jun-De Liao, Kang-Hsien Chang, Chun-Jen Chen, Pei-Hsuan Weng, Yi-Hsuan Lai, Ming-Hung Lin, Shu-Ming Chang, Zih-Hao Lin
  • Publication number: 20220377161
    Abstract: At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package comprises a substrate, an antenna, and an active component. The antenna is disposed at least partially within the substrate. The active component is disposed on the substrate and electrically connected to the antenna. A location of the antenna is configured to be adjustable with respect to a location of the active component.
    Type: Application
    Filed: May 19, 2021
    Publication date: November 24, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yuanhao YU, Chung Ju YU, Jui-Hsien WANG, Chai-Chi LIN, Hong Jie CHEN
  • Publication number: 20220364995
    Abstract: A portable ring-type fluorescence optical system for observing microfluidic channel and an operating method thereof are disclosed. The portable ring-type fluorescence optical system includes a photographic chip, a first polarizer, an objective lens, a ring-type fluorescent light source, a biological sample on a microfluidic chip, a second polarizer and a bottom illumination light source arranged in order from top to bottom. The ring-type fluorescent light source is used to generate a ring-type fluorescent light to the biological sample on the microfluidic chip. The objective lens is used to magnify a fluorescent image of the biological sample on the microfluidic chip to focus on the photographic chip. The first polarizer disposed under the photographic chip and the second polarizer disposed under the biological sample form a non-zero angle to each other to block reflected lights that the biological sample reflects the lights emitted by the bottom illumination light source.
    Type: Application
    Filed: August 9, 2021
    Publication date: November 17, 2022
    Applicant: NATIONAL TSING HUA UNIVERSITY
    Inventors: Sung-Yang WEI, Long HSU, Hwan-You CHANG, Huang-Ming CHEN, Jen-Tsan CHI, Chung-Cheng CHOU, Yuh-Cherng LAI, Hung-Yu YEH, Ting-Chou WEI, Yun-Ting YAO, Cheng-Hsien LIU
  • Publication number: 20220330492
    Abstract: A carbon dioxide and exhaust gas capture device that is a device being unique in the world and being able to truly suppress carbon dioxide is provides and has a cold water tank set, a photosynthetic tank set, and a terrestrial plant tank set. The cold water tank set reduces temperature of exhaust gas and filters toxic gases and pollutant particles. The photosynthetic tank set and the terrestrial plant tank set further photosynthesize the exhaust gas with organisms that derive energy from photosynthesis and terrestrial plants to produce oxygen. Moreover, the carbon dioxide and exhaust gas capture device requires low cost, has high efficiency, produces zero pollution during the process, has a long service life, and has high added value.
    Type: Application
    Filed: April 14, 2021
    Publication date: October 20, 2022
    Inventor: Chung-Hsien Chen
  • Patent number: 11439871
    Abstract: A system for determining an assessment of at least one exercise performed by a user is described. The system includes an input device, and a computing device. The input device is configured to monitor at least one exercise performed by a user. The computing device includes processors and a memory. The memory is coupled to the processors and stores program instructions that when executed by the processors cause the processors to: (1) generate a user interface displaying a content; (2) provide an instruction associated with the at least one exercise; (3) determine an indication of movement associated with the at least one exercise; (4) in response to a determination of the indication of movement, determine an assessment of the at least one exercise; and (5) in response to a determination of the assessment of the at least one exercise, perform an operation.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: September 13, 2022
    Assignee: Conzian Ltd.
    Inventors: Yan-Fu Liu, Po-Jui Huang, Liang-Kai Wang, Chung-Hsien Wu, Jian-Lin Chen
  • Publication number: 20220278091
    Abstract: A semiconductor structure including first finfet cells and second finfet cells. Each of the first finfet cells has an analog fin boundary according to analog circuit design rules, and each of the second finfet cells has a digital fin boundary according to digital circuit design rules. The semiconductor structure further includes first circuits formed with the first finfet cells, second circuits formed with the second finfet cells, and third circuits formed with one or more of the first finfet cells and one or more of the second finfet cells.
    Type: Application
    Filed: December 6, 2021
    Publication date: September 1, 2022
    Inventors: Chung-Hui Chen, Weichih Chen, Tien-Chien Huang, Chien-Chun Tsai, Ruey-Bin Sheen, Tsung-Hsin Yu, Chih-Hsien Chang, Cheng-Hsiang Hsieh
  • Publication number: 20220254687
    Abstract: Methods for tuning threshold voltages of fin-like field effect transistor (FinFET) devices are disclosed herein. An exemplary integrated circuit device includes a high voltage n-type FinFET, a high voltage p-type FinFET, a low voltage n-type FinFET, and a low voltage p-type FinFET. Threshold voltages of the high voltage n-type FinFET and the high voltage p-type FinFET are greater than threshold voltages of the low voltage n-type FinFET and the low voltage p-type FinFET, respectively. The high voltage n-type FinFET, the high voltage p-type FinFET, the low voltage n-type FinFET, and the low voltage p-type FinFET each include a threshold voltage tuning layer that includes tantalum and nitrogen. Thicknesses of the threshold voltage tuning layer of the low voltage n-type FinFET and the low voltage p-type FinFET are less than thicknesses of the threshold voltage tuning layer of the high voltage n-type FinFET and the high voltage p-type FinFET, respectively.
    Type: Application
    Filed: May 2, 2022
    Publication date: August 11, 2022
    Inventors: Chung-Liang Cheng, Wei-Jen Chen, Yen-Yu Chen, Ming-Hsien Lin
  • Publication number: 20220238669
    Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, a source/drain (S/D) region and a contact. The S/D region is located in the substrate and on a side of the gate structure. The contact lands on and connected to the S/D region. The contact wraps around the S/D region.
    Type: Application
    Filed: March 3, 2022
    Publication date: July 28, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Hsien Cheng, Jr-Hung Li, Tai-Chun Huang, Tze-Liang Lee, Chung-Ting Ko, Jr-Yu Chen, Wan-Chen Hsieh
  • Publication number: 20220026062
    Abstract: The instant disclosure described a system and method to prevent the oxidizer overheating using cold side bypass for a VOCs treatment system with series rotor, which may be used in an organic waste air treatment system. The system is equipped with a Thermal Oxidizer (TO), a First Heat Exchanger, a Second Heat Exchanger, a third heat exchanger, a First Cold-Side Transporting Pipeline, a First Adsorption Rotor, a Second Adsorption Rotor, and a Chimney. There is a Cold-Side Proportional Damper installed between the First Desorption-Treated Air Pipeline and the First Cold-Side Transporting Pipeline, or it is installed on the First Desorption-Treated Air Pipeline. When the VOCs concentration becomes higher, the Cold-Side Proportional Damper can regulate the airflow to adjust the heat-recovery amount or concentration, when treating the organic waste air, it can prevent the TO from being overheated due to high oxidizer temperature, and protect it from Thermal Oxidizer shut-down.
    Type: Application
    Filed: July 5, 2021
    Publication date: January 27, 2022
    Inventors: Shih-Chih CHENG, Kuo-Yuan LIN, Ya-Ming FU, Chung-Hsien CHEN, Pang-Yu LIU
  • Publication number: 20220026063
    Abstract: A system and method to prevent the oxidizer overheating using cold side bypass during high input for a VOCs treatment system with series rotor are described, which may be used in an organic waste air treatment system. The system is equipped with a Thermal Oxidizer (TO), a First Heat Exchanger, a Second Heat Exchanger, a third heat exchanger, a Fourth Heat Exchanger, a First Cold-Side Transporting Pipeline, a Fourth Cold-Side Transporting Pipeline, a First Adsorption Rotor, a Second Adsorption Rotor, and a Chimney. There is a Cold-Side Proportional Damper installed between the First Desorption-Treated Air Pipeline and the First Cold-Side Transporting Pipeline, the First Desorption-Treated Air Pipeline and the Fourth Cold-Side Transporting Pipeline or between the First Cold-Side Transporting Pipeline and the Fourth Cold-Side Transporting Pipeline, or the damper is installed on the First Desorption-Treated Air Pipeline.
    Type: Application
    Filed: June 16, 2021
    Publication date: January 27, 2022
    Inventors: Shih-Chih CHENG, Kuo-Yuan LIN, Ya-Ming FU, Chung-Hsien CHEN, Pang-Yu LIU
  • Publication number: 20180295437
    Abstract: An electro-acoustic product stabilizing device includes: a sound device; an angle adjustment element, coupled pivotally to one side of the sound device; a hard fixation portion, configured on one side of the angle adjustment element; and a flexible support element, in connection with the angle adjustment element. Whereby, when the electro-acoustic product of the present invention is a headset or hearing aid, it is attached and fixed in a user's ear through the characteristic of the flexible support element being capable of adaptable shape change to be fixed to the use's inner ear bones; and then, the attachment of the flexible support element to the ear to be more comfortable through the angle adjustment element in combination with the sound device. In addition, the strengthening fixation of the hard fixation portion to the sound device increases the combination stability of the sound device with the ear.
    Type: Application
    Filed: April 11, 2017
    Publication date: October 11, 2018
    Inventor: Chung-Hsien CHEN
  • Publication number: 20180234753
    Abstract: The earpiece structure includes a main member having a sound releasing element on an inner side, a fixation element besides the sound releasing element slant toward an outer side of the main member, and an extension element between the sound releasing element and the fixation element. A number of through opening are configured on the extension element, each configured with a tuning element. A speaker element is disposed on the fixation element. Due to the slant arrangement of the fixation element, the sound wave from the speaker element progresses directly towards a user's eardrum through the ear canal. The tuning elements achieve an optimal proportion between air pressures of front and rear chambers of the earpiece structure, allowing the sound wave to reverberate and reflect in a sound space and achieving superior sound field.
    Type: Application
    Filed: February 13, 2017
    Publication date: August 16, 2018
    Inventor: CHUNG-HSIEN CHEN
  • Publication number: 20170335850
    Abstract: A scroll type air compressor provided by the invention utilizes an L-shape mounting frame for respectively mounting a compressor and a generator to a first mounting section and a second mounting section thereon. The generator is mounted to the second mounting section via a plate and is capable of being fine-tuned in displacement with respect to the plate, such that a second end surface of a second drive pulley of the generator can be made coplanar with a first end surface of a first drive pulley of the compressor. The position of the plate can also be adjusted up and down with respect to the second mounting section to a required position so that the distance between the drive pulleys of the generator and the compressor can be adjusted and the tension of a transmission belt can be determined.
    Type: Application
    Filed: December 28, 2016
    Publication date: November 23, 2017
    Inventors: Yi-Chao Huang, Jou-Chien Chen, Chung-Hsien Chen, Yun-Kai Chang
  • Patent number: 9634001
    Abstract: A FinFET structure layout includes a semiconductor substrate comprising a plurality of FinFET active areas, and a plurality of fins within each FinFET active area of the plurality of FinFET active areas. The FinFET structure layout further includes a gate having a gate length parallel to the semiconductor substrate and perpendicular to length of the plurality of fins within each FinFET active area of the plurality of FinFET active areas. The FinFET structure layout further includes a plurality of metal features connecting a source region or a drain region of a portion of the plurality of FinFET active areas to a plurality of contacts. The plurality of metal features includes a plurality of metal lines parallel to a FinFET channel direction and a plurality of metal lines parallel to a FinFET channel width direction.
    Type: Grant
    Filed: July 28, 2014
    Date of Patent: April 25, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Clement Hsingjen Wann, Chih-Sheng Chang, Yi-Tang Lin, Ming-Feng Shieh, Ting-Chu Ko, Chung-Hsien Chen
  • Patent number: 9536772
    Abstract: The disclosure relates to a fin structure of a semiconductor device. An exemplary fin structure for a semiconductor device comprises a lower portion protruding from a major surface of a substrate, wherein the lower portion comprises a first semiconductor material having a first lattice constant; an upper portion having an interface with the lower portion, wherein the upper portion comprises a second semiconductor material having a second lattice constant different from the first lattice constant; a first pair of notches lower than the interface and extending into opposite sides of the lower portion, wherein each first notch have a first width; and a second pair of notches extending into opposite sides of the interface, wherein each second notch have a second width greater than the first width.
    Type: Grant
    Filed: July 7, 2015
    Date of Patent: January 3, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Hsien Chen, Tung Ying Lee, Yu-Lien Huang, Chi-Wen Liu
  • Patent number: 9379108
    Abstract: A method of fabricating a semiconductor device comprises forming a fin structure extending from a substrate, the fin structure comprising a first fin, a second fin, and a third fin between the first fin and the second fin. The method further comprises forming germanide over a first facet of the first fin, a second facet of the second fin, and a substantially planar surface of the third fin, wherein the first facet forms a first acute angle with a major surface of the substrate and is substantially mirror symmetric with the second facet, and wherein the substantially planar surface of the third fin forms a second acute angle smaller than the first acute angle with the major surface of the substrate.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: June 28, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Clement Hsingjen Wann, Ling-Yen Yeh, Chi-Wen Liu, Chi-Yuan Shih, Li-Chi Yu, Meng-Chun Chang, Ting-Chu Ko, Chung-Hsien Chen
  • Patent number: 9236253
    Abstract: A semiconductor device comprises a substrate comprising a major surface; a p-type Field Effect Transistor (pFET) comprising: a P-gate stack over the major surface, a P-strained region in the substrate adjacent to one side of the P-gate stack, wherein a lattice constant of the P-strained region is different from a lattice constant of the substrate, wherein the P-strained region has a first top surface higher than the major surface; and a P-silicide region on the P-strained region; and an n-type Field Effect Transistor (nFET) comprising: an N-gate stack over the major surface, an N-strained region in the substrate adjacent to one side of the N-gate stack, wherein a lattice constant of the N-strained region is different from a lattice constant of the substrate, wherein the N-strained region has a second top surface lower than the major surface and a N-silicide region on the N-strained region.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: January 12, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Hsien Chen, Ting-Chu Ko, Chih-Hao Chang, Chih-Sheng Chang, Shou-Zen Chang, Clement Hsingjen Wann
  • Publication number: 20150311111
    Abstract: The disclosure relates to a fin structure of a semiconductor device. An exemplary fin structure for a semiconductor device comprises a lower portion protruding from a major surface of a substrate, wherein the lower portion comprises a first semiconductor material having a first lattice constant; an upper portion having an interface with the lower portion, wherein the upper portion comprises a second semiconductor material having a second lattice constant different from the first lattice constant; a first pair of notches lower than the interface and extending into opposite sides of the lower portion, wherein each first notch have a first width; and a second pair of notches extending into opposite sides of the interface, wherein each second notch have a second width greater than the first width.
    Type: Application
    Filed: July 7, 2015
    Publication date: October 29, 2015
    Inventors: Chung-Hsien Chen, Tung Ying Lee, Yu-Lien Huang, Chi-Wen Liu
  • Publication number: 20150236016
    Abstract: A method of fabricating a semiconductor device comprises forming a fin structure extending from a substrate, the fin structure comprising a first fin, a second fin, and a third fin between the first fin and the second fin. The method further comprises forming germanide over a first facet of the first fin, a second facet of the second fin, and a substantially planar surface of the third fin, wherein the first facet forms a first acute angle with a major surface of the substrate and is substantially mirror symmetric with the second facet, and wherein the substantially planar surface of the third fin forms a second acute angle smaller than the first acute angle with the major surface of the substrate.
    Type: Application
    Filed: April 30, 2015
    Publication date: August 20, 2015
    Inventors: Clement Hsingjen Wann, Ling-Yen Yeh, Chi-Wen Liu, Chi-Yuan Shih, Li-Chi Yu, Meng-Chun Chang, Ting-Chu Ko, Chung-Hsien Chen