Patents by Inventor Chung Hsing Lin

Chung Hsing Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12243821
    Abstract: A conductive line structure includes: first and second offset sets of long pillars that are substantially coaxial on an intra-set basis; a third set of offset short pillars, the short pillars being: overlapping of long pillars in the first and second sets; and organized into groups of first quantities of the short pillars; each of the groups being overlapping of and electrically coupled between a pair of one of the long pillars in the first set and a one of the long pillars in the second set such that, in each of the groups, each short pillar being overlapping of and electrically coupled between the pair; and each long pillar in each of the first and second sets being overlapped by a second quantity of short pillars in the third set and being electrically coupled to same; and the first quantity being less than the second quantity.
    Type: Grant
    Filed: February 1, 2024
    Date of Patent: March 4, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hiranmay Biswas, Chi-Yeh Yu, Kuo-Nan Yang, Chung-Hsing Wang, Stefan Rusu, Chin-Shen Lin
  • Patent number: 10475738
    Abstract: A semiconductor device preferably includes: a first metal-oxide semiconductor (MOS) transistor on a substrate; a first ferroelectric (FE) layer connected to the first MOS transistor; a second MOS transistor on the substrate; and a second FE layer connected to the second MOS transistor. Preferably, the first FE layer and the second FE layer include different capacitance.
    Type: Grant
    Filed: December 27, 2016
    Date of Patent: November 12, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Kung-Hong Lee, Mu-Kai Tsai, Chung-Hsing Lin
  • Publication number: 20180182860
    Abstract: A semiconductor device preferably includes: a first metal-oxide semiconductor (MOS) transistor on a substrate; a first ferroelectric (FE) layer connected to the first MOS transistor; a second MOS transistor on the substrate; and a second FE layer connected to the second MOS transistor. Preferably, the first FE layer and the second FE layer include different capacitance.
    Type: Application
    Filed: December 27, 2016
    Publication date: June 28, 2018
    Inventors: Kung-Hong Lee, Mu-Kai Tsai, Chung-Hsing Lin
  • Patent number: 5766692
    Abstract: A process for depositing an oxynitride film on a substrate by liquid phase deposition. A nitrogen radical-containing solution is added to a silicon dioxide supersaturated solution to obtain a deposition solution. Then, a substrate is contacted with the deposition solution to deposit the oxynitride film on the substrate, followed by thermal annealing under nitrogen.
    Type: Grant
    Filed: March 17, 1997
    Date of Patent: June 16, 1998
    Assignee: National Science Council
    Inventors: Ming-Kwei Lee, Chung-Hsing Lin
  • Patent number: D467897
    Type: Grant
    Filed: November 19, 2001
    Date of Patent: December 31, 2002
    Assignee: Billion Sound Trading Company
    Inventor: Chung Hsing Lin