Patents by Inventor Chung-Huai CHANG

Chung-Huai CHANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210202732
    Abstract: A FinFET device structure is provided. The FinFET device structure includes a gate structure formed over a fin structure, and a gate spacer layer formed on a sidewall of the gate structure. The FinFET device structure includes a gate contact structure formed over the gate structure, and a first isolation layer surrounding the gate contact structure.
    Type: Application
    Filed: March 12, 2021
    Publication date: July 1, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Huai CHANG, Chao-Hsun WANG, Kuo-Yi CHAO, Mei-Yun WANG
  • Patent number: 10950728
    Abstract: A FinFET device structure is provided. The FinFET device structure includes a gate structure formed over a fin structure and an S/D contact structure formed over the fin structure. The FinFET device structure also includes an S/D conductive plug formed over the S/D contact structure, and the S/D conductive plug includes a first barrier layer and a first conductive layer. The FinFET device structure includes a gate contact structure formed over the gate structure, and the gate contact structure includes a second barrier layer and a second conductive layer. The FinFET device structure includes a first isolation layer surrounding the S/D conductive plug, and the first barrier layer is between the first isolation layer and the first conductive layer. A second isolation layer surrounding the gate contact structure, and the second barrier layer is between the second isolation layer and the second conductive layer.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: March 16, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Huai Chang, Chao-Hsun Wang, Kuo-Yi Chao, Mei-Yun Wang
  • Publication number: 20190148537
    Abstract: A FinFET device structure is provided. The FinFET device structure includes a gate structure formed over a fin structure and an S/D contact structure formed over the fin structure. The FinFET device structure also includes an S/D conductive plug formed over the S/D contact structure, and the S/D conductive plug includes a first barrier layer and a first conductive layer. The FinFET device structure includes a gate contact structure formed over the gate structure, and the gate contact structure includes a second barrier layer and a second conductive layer. The FinFET device structure includes a first isolation layer surrounding the S/D conductive plug, and the first barrier layer is between the first isolation layer and the first conductive layer. A second isolation layer surrounding the gate contact structure, and the second barrier layer is between the second isolation layer and the second conductive layer.
    Type: Application
    Filed: April 27, 2018
    Publication date: May 16, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Huai CHANG, Chao-Hsun WANG, Kuo-Yi CHAO, Mei-Yun WANG