Patents by Inventor Chung-Huang LIU

Chung-Huang LIU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11074148
    Abstract: A method for displaying a basic input-output system (BIOS) message during a power-on self-test (POST) of a computer system includes: after the computer system is connected to a power source, performing, by a baseboard management controller (BMC), an initialization procedure on a display unit so as to control the display unit; executing, by a processor, a BIOS stored in a memory component so as to generate the BIOS message; transmitting, by the processor, the BIOS message to the BMC; and transmitting, by the BMC, the BIOS message to the display unit.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: July 27, 2021
    Assignee: MITAC COMPUTING TECHNOLOGY CORPORATION
    Inventors: Chung-Huang Liu, Chen-Nan Hsiao
  • Patent number: 10802918
    Abstract: A computer device, a server device, and a method for controlling a hybrid memory unit thereof are provided. The control method includes: executing, by a processing unit, an operating system (OS) in a working mode of the computer device; triggering, by a soft off control signal or a soft reset control signal when the processing unit executes the OS, the processing unit to enter an interrupt processing mode; executing, by the processing unit, basic input/output system (BIOS) program code in the interrupt processing mode; and controlling, by the processing unit by using the BIOS program code, to store data from a volatile memory into a non-volatile memory corresponding to the volatile memory.
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: October 13, 2020
    Assignee: MITAC COMPUTING TECHNOLOGY CORPORATION.
    Inventors: Wei-Lung Shen, Chen-Nan Hsiao, Chih-Cheng Wang, Chung-Huang Liu
  • Publication number: 20200073773
    Abstract: A method for displaying a basic input-output system (BIOS) message during a power-on self-test (POST) of a computer system includes: after the computer system is connected to a power source, performing, by a baseboard management controller (BMC), an initialization procedure on a display unit so as to control the display unit; executing, by a processor, a BIOS stored in a memory component so as to generate the BIOS message; transmitting, by the processor, the BIOS message to the BMC; and transmitting, by the BMC, the BIOS message to the display unit.
    Type: Application
    Filed: August 27, 2019
    Publication date: March 5, 2020
    Applicant: MITAC COMPUTING TECHNOLOGY CORPORATION
    Inventors: Chung-Huang LIU, Chen-Nan HSIAO
  • Publication number: 20190286527
    Abstract: A computer device, a server device, and a method for controlling a hybrid memory unit thereof are provided. The control method includes: executing, by a processing unit, an operating system (OS) in a working mode of the computer device; triggering, by a soft off control signal or a soft reset control signal when the processing unit executes the OS, the processing unit to enter an interrupt processing mode; executing, by the processing unit, basic input/output system (BIOS) program code in the interrupt processing mode; and controlling, by the processing unit by using the BIOS program code, to store data from a volatile memory into a non-volatile memory corresponding to the volatile memory.
    Type: Application
    Filed: January 10, 2019
    Publication date: September 19, 2019
    Applicant: MITAC COMPUTING TECHNOLOGY CORPORATION.
    Inventors: Wei-Lung SHEN, Chen-Nan HSIAO, Chih-Cheng WANG, Chung-Huang LIU
  • Patent number: 4062815
    Abstract: Resin peptides useful in the preparation of salmon calcitonin are disclosed along with processes for preparing the same. The invention also embraces peptides from which the resin moiety has been cleaved and which are useful in the synthesis of salmon calcitonin together with processes for preparing the cleaved peptides. In general, the processes involve the solid phase synthesis procedures.
    Type: Grant
    Filed: September 22, 1975
    Date of Patent: December 13, 1977
    Assignee: Armour Pharmaceutical Company
    Inventors: John Lawrence Hughes, Jay Kenneth Seyler, Robert Chung-Huang Liu