Patents by Inventor Chung-Hung Peng

Chung-Hung Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8569759
    Abstract: An active device array substrate including a substrate, a plurality of pixels, a plurality of signal lines, and a repairing structure is provided. The substrate has a display region and a periphery region. The pixels are arranged on the display region of the substrate as an array. The signal lines are electrically connected to the pixels and are respectively extended from the display region to the periphery region. The repairing structure is disposed at the periphery region, and which includes a first repairing line, a second repairing line, an electrostatic discharge (ESD) releasing line, and an ESD protector. The first repairing line is intersected with one ends of the signal lines and is electrically floated. The ESD protector is connected between the second repairing line and the ESD releasing line, and the ESD protector is overlapped with and electrically insulated from the first repairing line.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: October 29, 2013
    Assignee: Au Optronics Corporation
    Inventors: Wen-Chi Chuang, Chung-Hung Peng, Tung-Tsun Lin, Ya-Ling Kuo
  • Patent number: 8503601
    Abstract: A gate-on array shift register includes a signal-input unit, a control transistor and at least three stable modules. The signal-input unit receives and outputs a previous-stage output signal. The control terminal of the control transistor is electrically coupled to the signal-input unit for receiving the previous-stage output signal. The control transistor outputs corresponding output signal on output terminal of the shift register according to the previous-stage output signal. Each of the stable modules is electrically coupled to the control terminal of the control transistor and the output terminal of the shift register to stabilize voltage of the terminals.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: August 6, 2013
    Assignee: AU Optronics Corp.
    Inventors: Po-Kai Wang, Chun-Hao Huang, Chung-Hung Peng
  • Publication number: 20120093276
    Abstract: A gate-on array shift register includes a signal-input unit, a control transistor and at least three stable modules. The signal-input unit receives and outputs a previous-stage output signal. The control terminal of the control transistor is electrically coupled to the signal-input unit for receiving the previous-stage output signal. The control transistor outputs corresponding output signal on output terminal of the shift register according to the previous-stage output signal. Each of the stable modules is electrically coupled to the control terminal of the control transistor and the output terminal of the shift register to stabilize voltage of the terminals.
    Type: Application
    Filed: September 23, 2011
    Publication date: April 19, 2012
    Applicant: AU OPTRONICS CORP.
    Inventors: Po-Kai WANG, Chun-Hao HUANG, Chung-Hung PENG
  • Publication number: 20120050241
    Abstract: A display panel includes a first substrate, a second substrate, a display media layer, a signal transferring structure, a passivation layer and a sealant. The first substrate includes an active region and a peripheral region. The peripheral region includes a driving circuit region, and the driving circuit region includes a signal transferring region. The second substrate and the first substrate are disposed oppositely. The display media layer is disposed between the first substrate and the second substrate. The signal transferring structure is disposed in the signal transferring region of the first substrate. The passivation layer is disposed on the first substrate, and the passivation layer entirely covers at least the signal transferring structure. The sealant is disposed on the passivation layer for bonding the first substrate and the second substrate together.
    Type: Application
    Filed: April 13, 2011
    Publication date: March 1, 2012
    Inventors: Chun-Hao Huang, Chung-Hung Peng
  • Patent number: 8077270
    Abstract: An array substrate includes: a base having an active region and a peripheral region adjoining to the active region; a plurality of signal lines disposed on the base; and at least one repair structure disposed on the peripheral region and having at least one first repair line and at least one second repair line having a first sub-line and a second sub-line. The first sub-line is located between the first repair line and the second sub-line. The signal lines have a plurality of groups; the first repair line crosses over at least two of the groups of the signal lines; and at least one of the groups of the signal lines is crossed over by only one of the first sub-line and the second sub-line.
    Type: Grant
    Filed: April 15, 2010
    Date of Patent: December 13, 2011
    Assignee: Au Optronics Corp.
    Inventors: Chung-Hung Peng, Meng-Chieh Cheng, Chin-Fon Chen
  • Publication number: 20110278574
    Abstract: An active device array substrate including a substrate, a plurality of pixels, a plurality of signal lines, and a repairing structure is provided. The substrate has a display region and a periphery region. The pixels are arranged on the display region of the substrate as an array. The signal lines are electrically connected to the pixels and are respectively extended from the display region to the periphery region. The repairing structure is disposed at the periphery region, and which includes a first repairing line, a second repairing line, an electrostatic discharge (ESD) releasing line, and an ESD protector. The first repairing line is intersected with one ends of the signal lines and is electrically floated. The ESD protector is connected between the second repairing line and the ESD releasing line, and the ESD protector is overlapped with and electrically insulated from the first repairing line.
    Type: Application
    Filed: June 28, 2010
    Publication date: November 17, 2011
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Wen-Chi Chuang, Chung-Hung Peng, Tung-Tsun Lin, Ya-Ling Kuo
  • Patent number: 8059780
    Abstract: An exemplary shift register circuit includes a shift register, a first switching circuit and a second switching circuit. The shift register has a start pulse signal input terminal and a start pulse signal output terminal. The first switching circuit includes a first input switch unit and a second output switch unit respectively electrically coupled to the start pulse signal input terminal and the start pulse signal output terminal. The second switching circuit includes a second input switch unit and a first output switch unit respectively electrically coupled to the start pulse signal input terminal and the start pulse signal output terminal. Moreover, on-off states of the first input and first output switch units are opposite to on-off states of the second input and second output switch units. Moreover, a gate driving circuit using the above-mentioned shift register and switching circuits also is provided.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: November 15, 2011
    Assignee: Au Optronics Corp.
    Inventors: Po-Kai Wang, Chun-Hao Huang, Chung-Hung Peng
  • Publication number: 20110228894
    Abstract: An exemplary shift register circuit includes a shift register, a first switching circuit and a second switching circuit. The shift register has a start pulse signal input terminal and a start pulse signal output terminal. The first switching circuit includes a first input switch unit and a second output switch unit respectively electrically coupled to the start pulse signal input terminal and the start pulse signal output terminal. The second switching circuit includes a second input switch unit and a first output switch unit respectively electrically coupled to the start pulse signal input terminal and the start pulse signal output terminal. Moreover, on-off states of the first input and first output switch units are opposite to on-off states of the second input and second output switch units. Moreover, a gate driving circuit using the above-mentioned shift register and switching circuits also is provided.
    Type: Application
    Filed: August 2, 2010
    Publication date: September 22, 2011
    Applicant: AU OPTRONICS CORP.
    Inventors: Po-Kai WANG, Chun-Hao Huang, Chung-Hung Peng
  • Patent number: 7880856
    Abstract: A pixel unit including a pixel electrode, a scan electrode, a common voltage electrode, a data electrode and at least one redundancy electrode is provided. During the fabricating process of the pixel unit, if a particle is simultaneously located between any two of the pixel electrode, the scan electrode and the common voltage electrode, it would cause a short circuit between the two electrodes. The pixel unit can generate a cross-shaped defect signal at the location where a short circuit happens when the pixel unit undergoes an array test or a cell test. The user can thereby quickly locate the defect and repair it.
    Type: Grant
    Filed: April 16, 2007
    Date of Patent: February 1, 2011
    Assignee: Au Optronics Corporation
    Inventors: Chung-Hung Peng, Meng-ying Hsieh, Chi-Hung Lu, Chin-Fon Chen
  • Publication number: 20100193222
    Abstract: An array substrate includes: a base having an active region and a peripheral region adjoining to the active region; a plurality of signal lines disposed on the base; and at least one repair structure disposed on the peripheral region and having at least one first repair line and at least one second repair line having a first sub-line and a second sub-line. The first sub-line is located between the first repair line and the second sub-line. The signal lines have a plurality of groups; the first repair line crosses over at least two of the groups of the signal lines; and at least one of the groups of the signal lines is crossed over by only one of the first sub-line and the second sub-line.
    Type: Application
    Filed: April 15, 2010
    Publication date: August 5, 2010
    Applicant: AU OPTRONICS CORP.
    Inventors: Chung-Hung Peng, Meng-Chieh Cheng, Chin-Fon Chen
  • Patent number: 7755712
    Abstract: An array substrate, and method for repairing thereof, and display panel and apparatus comprising the same are provided. The array substrate includes a base, a plurality of signal lines, and at least one repair structure. The base has an active region and a peripheral region adjoining to the active region. The signal lines are disposed on the base. The repair structure, is disposed on the peripheral region, and has at least one first repair line and at least one second repair line. The second repair line has a first sub-line and a second sub-line. The first sub-line is located between the first repair line and the second sub-line.
    Type: Grant
    Filed: February 5, 2007
    Date of Patent: July 13, 2010
    Assignee: AU Optronics Corp.
    Inventors: Chung-Hung Peng, Meng-Chieh Cheng, Chin-Fon Chen
  • Publication number: 20080157809
    Abstract: A pixel unit including a pixel electrode, a scan electrode, a common voltage electrode, a data electrode and at least one redundancy electrode is provided. During the fabricating process of the pixel unit, if a particle is simultaneously located between any two of the pixel electrode, the scan electrode and the common voltage electrode, it would cause a short circuit between the two electrodes. The pixel unit can generate a cross-shaped defect signal at the location where a short circuit happens when the pixel unit undergoes an array test or a cell test. The user can thereby quickly locate the defect and repair it.
    Type: Application
    Filed: April 16, 2007
    Publication date: July 3, 2008
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Chung-Hung Peng, Meng-ying Hsieh, Chi-Hung Lu, Chin-Fon Chen
  • Publication number: 20080062347
    Abstract: An array substrate, and method for repairing thereof, and display panel and apparatus comprising the same are provided. The array substrate includes a base, a plurality of signal lines, and at least one repair structure. The base has an active region and a peripheral region adjoining to the active region. The signal lines are disposed on the base. The repair structure, is disposed on the peripheral region, and has at least one first repair line and at least one second repair line. The second repair line has a first sub-line and a second sub-line. The first sub-line is located between the first repair line and the second sub-line.
    Type: Application
    Filed: February 5, 2007
    Publication date: March 13, 2008
    Applicant: AU OPTRONICS CORP.
    Inventors: Chung-Hung Peng, Meng-Chieh Cheng, Chin-Fon Chen