Patents by Inventor CHUNG-HYUN LEE
CHUNG-HYUN LEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240236693Abstract: Disclosed are a semi-distributed spectrum sensing method in cognitive IoT networks, and an apparatus thereof. The semi-distributed spectrum sensing method in cognitive IoT networks includes: (a) grouping, based on local information of pre-shared secondary terminals, each secondary terminal into each local cluster; (b) generating overlapping point information by calculating an overlapping range between directional antenna beams of the respective secondary terminals in the each local cluster, and determining a beam determination binary indicator of the each secondary terminal by using the overlapping point information; and (c) calculating and adjusting the overlapping range between the respective local clusters.Type: ApplicationFiled: January 10, 2024Publication date: July 11, 2024Inventors: Sung Rae CHO, Chung Hyun LEE, Dong Hyun LEE, Jun Suk OH
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Patent number: 11656186Abstract: Disclosed is a method for analyzing a shape of a wafer. The method includes measuring external shapes of a plurality of wafers, detecting a first point having a maximum curvature in an edge region of each wafer from measured values acquired in the measuring the external shapes of the wafers, detecting a second point spaced apart from the first point in a direction towards an apex of a corresponding one of the wafers, measuring a first angle formed between a first line configured to connect the first point and the second point and a front side of the corresponding one of the wafers, forming a thin film layer on a surface of each wafer, measuring a thickness profile of the thin film layer, and confirming a wafer in which a maximum value of the thickness profile of the thin film layer is the smallest among the wafers.Type: GrantFiled: October 13, 2020Date of Patent: May 23, 2023Assignee: SK SILTRON CO., LTD.Inventor: Chung Hyun Lee
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Publication number: 20220279810Abstract: A confectionery product comprising of a layer of gummy confectionery, made up of one or more sections, which coat a non-edible object or container. This container is purposed to house a children's toy and support the layer of confectionery. Methods of preparing the confectionery-coated object also are provided.Type: ApplicationFiled: August 7, 2020Publication date: September 8, 2022Inventors: Chung Hyun Lee, David Johnston Smith, Diwata Katrina Dinglasa Santillan, Ethan Luke Harrold, Ethan Hutchinson
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Publication number: 20220018788Abstract: Disclosed is a method for analyzing a shape of a wafer. The method includes measuring external shapes of a plurality of wafers, detecting a first point having a maximum curvature in an edge region of each wafer from measured values acquired in the measuring the external shapes of the wafers, detecting a second point spaced apart from the first point in a direction towards an apex of a corresponding one of the wafers, measuring a first angle formed between a first line configured to connect the first point and the second point and a front side of the corresponding one of the wafers, forming a thin film layer on a surface of each wafer, measuring a thickness profile of the thin film layer, and confirming a wafer in which a maximum value of the thickness profile of the thin film layer is the smallest among the wafers.Type: ApplicationFiled: October 13, 2020Publication date: January 20, 2022Inventor: Chung Hyun LEE
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Patent number: 9905656Abstract: Provided is a semiconductor substrate including a seed layer disposed on a substrate, a buffer layer disposed on the seed layer, a plurality of nitride semiconductor layers disposed on the buffer layer, and at least one stress control layer between the plurality of nitride semiconductor layers. The buffer layer includes a plurality of step regions and at least one heterogeneous region. The plurality of step regions includes the same nitride semiconductor material. The heterogeneous region includes a different nitride semiconductor material from the step regions.Type: GrantFiled: January 3, 2017Date of Patent: February 27, 2018Assignee: SK Siltron Co., Ltd.Inventors: Kye-Jin Lee, Ho-Jun Lee, Young-Jae Choi, Jung-Hyun Eum, Chung-Hyun Lee
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Publication number: 20170141195Abstract: Provided is a semiconductor substrate including a seed layer disposed on a substrate, a buffer layer disposed on the seed layer, a plurality of nitride semiconductor layers disposed on the buffer layer, and at least one stress control layer between the plurality of nitride semiconductor layers. The buffer layer includes a plurality of step regions and at least one heterogeneous region. The plurality of step regions includes the same nitride semiconductor material. The heterogeneous region includes a different nitride semiconductor material from the step regions.Type: ApplicationFiled: January 3, 2017Publication date: May 18, 2017Inventors: Kye-Jin LEE, Ho-Jun LEE, Young-Jae CHOI, Jung-Hyun EUM, Chung-Hyun LEE
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Patent number: 9583575Abstract: Provided is a semiconductor substrate including a seed layer disposed on a substrate, a buffer layer disposed on the seed layer, a plurality of nitride semiconductor layers disposed on the buffer layer, and at least one stress control layer between the plurality of nitride semiconductor layers. The buffer layer includes a plurality of step regions and at least one heterogeneous region. The plurality of step regions includes the same nitride semiconductor material. The heterogeneous region includes a different nitride semiconductor material from the step regions.Type: GrantFiled: January 3, 2014Date of Patent: February 28, 2017Assignee: LG SILTRON INC.Inventors: Kye-Jin Lee, Ho-Jun Lee, Young-Jae Choi, Jung-Hyun Eum, Chung-Hyun Lee
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Publication number: 20150357418Abstract: Provided is a semiconductor substrate including a seed layer disposed on a substrate, a buffer layer disposed on the seed layer, a plurality of nitride semiconductor layers disposed on the buffer layer, and at least one stress control layer between the plurality of nitride semiconductor layers. The buffer layer includes a plurality of step regions and at least one heterogeneous region. The plurality of step regions includes the same nitride semiconductor material. The heterogeneous region includes a different nitride semiconductor material from the step regions.Type: ApplicationFiled: January 3, 2014Publication date: December 10, 2015Applicant: LG SILTRON INC.Inventors: Kye-Jin LEE, Ho-Jun LEE, Young-Jae CHOI, Jung-Hyun EUM, Chung-Hyun LEE
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Patent number: 8879320Abstract: A method of programming a multi-level cells (MLC) commonly coupled to a word line in a non-volatile memory device includes shadow-programming first MLC to a first shadow state, shadow-programming second MLC to a second shadow state less than the first shadow state, and then main-programming the first MLC from the first shadow state to a first final state and main-programming the second MLC from the second shadow state to the second final state less than the first final state.Type: GrantFiled: September 12, 2012Date of Patent: November 4, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Chung-Hyun Lee, Ki-Hwan Choi
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Publication number: 20130135929Abstract: A method of programming a multi-level cells (MLC) commonly coupled to a word line in a non-volatile memory device includes shadow-programming first MLC to a first shadow state, shadow-programming second MLC to a second shadow state less than the first shadow state, and then main-programming the first MLC from the first shadow state to a first final state and main-programming the second MLC from the second shadow state to the second final state less than the first final state.Type: ApplicationFiled: September 12, 2012Publication date: May 30, 2013Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: CHUNG-HYUN LEE, KI-HWAN CHOI
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Patent number: D1009402Type: GrantFiled: April 12, 2023Date of Patent: January 2, 2024Assignee: Zuru (Singapore) Pte. Ltd.Inventors: Mathew Peter Mowbray, Chung Hyun Lee, David Johnston Smith, Diwata Katrina Dinglasa Santillan, Ethan Luke Harrold, Ethan Hutchinson
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Patent number: D1012421Type: GrantFiled: July 26, 2023Date of Patent: January 30, 2024Assignee: Zuru (Singapore) Pte. Ltd.Inventors: Mathew Peter Mowbray, Chung Hyun Lee, David Johnston Smith, Diwata Katrina Dinglasa Santillan, Ethan Luke Harrold, Ethan Hutchinson
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Patent number: D1023504Type: GrantFiled: September 28, 2023Date of Patent: April 23, 2024Assignee: Zuru (Singapore) Pte. Ltd.Inventors: Mathew Peter Mowbray, Chung Hyun Lee, David Johnston Smith, Diwata Katrina Dinglasa Santillan, Ethan Luke Harrold, Ethan Hutchinson
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Patent number: D1050667Type: GrantFiled: January 12, 2024Date of Patent: November 12, 2024Assignee: ZURU (SINGAPORE) PTE. LTD.Inventors: Mathew Peter Mowbray, Chung Hyun Lee, David Johnston Smith, Diwata Katrina Dinglasa Santillan, Ethan Luke Harrold, Ethan Hutchinson
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Patent number: D1052222Type: GrantFiled: January 12, 2024Date of Patent: November 26, 2024Assignee: ZURU (SINGAPORE) PTE. LTD.Inventors: Mathew Peter Mowbray, Chung Hyun Lee, David Johnston Smith, Diwata Katrina Dinglasa Santillan, Ethan Luke Harrold, Ethan Hutchinson
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Patent number: D1056398Type: GrantFiled: March 29, 2024Date of Patent: January 7, 2025Assignee: ZURU (SINGAPORE) PTE. LTD.Inventors: Mathew Peter Mowbray, Chung Hyun Lee, David Johnston Smith, Diwata Katrina Dinglasa Santillan, Ethan Luke Harrold, Ethan Hutchinson