Patents by Inventor Chung-Il Hyun

Chung-Il Hyun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11121154
    Abstract: A semiconductor device includes a substrate, a stack, and channel structures penetrating the stack. The stack includes gate electrodes and insulating layers alternately and repeatedly stacked on the substrate, and extending in a first direction. The channel structures in a first row are spaced apart from each other in the first direction. The stack includes a first sidewall that includes first recessed portions and first protruding portions. Each of first recessed portions is defined by an adjacent pair of the first recessed portions. Each of the first recessed portions has a shape recessed toward a first region of the stack between an adjacent pair of the channel structures of the first row. Each of the first recessed portions has a width that decreases in a direction toward the first region when measured along the first direction.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: September 14, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Byoungkeun Son, Yoocheol Shin, Changhyun Lee, Hyunjung Kim, Chung-Il Hyun
  • Publication number: 20200212063
    Abstract: A semiconductor device includes a substrate, a stack, and channel structures penetrating the stack. The stack includes gate electrodes and insulating layers alternately and repeatedly stacked on the substrate, and extending in a first direction. The channel structures in a first row are spaced apart from each other in the first direction. The stack includes a first sidewall that includes first recessed portions and first protruding portions. Each of first recessed portions is defined by an adjacent pair of the first recessed portions. Each of the first recessed portions has a shape recessed toward a first region of the stack between an adjacent pair of the channel structures of the first row. Each of the first recessed portions has a width that decreases in a direction toward the first region when measured along the first direction.
    Type: Application
    Filed: March 6, 2020
    Publication date: July 2, 2020
    Inventors: Byoungkeun SON, Yoocheol SHIN, Changhyun LEE, Hyunjung KIM, Chung-Il HYUN
  • Patent number: 10658230
    Abstract: A semiconductor device includes a comprise a substrate including a main zone and an extension zone, vertical channels on the main zone, and an electrode structure including gate electrodes stacked on the substrate. The vertical channel structures extend in a first direction perpendicular to a top surface of the substrate. The gate electrodes include line regions and contact regions. The line regions extend from the main zone toward the extension zone along a second direction the second direction that is perpendicular to the first direction. The contact regions are on ends of the line regions and are thicker than the line regions. A spacing distance in the second direction between the contact regions is greater than a spacing distance in the first direction between the line regions.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: May 19, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chung-Il Hyun, Semee Jang, Sung Yun Lee
  • Patent number: 10586808
    Abstract: A semiconductor device includes a substrate, a stack, and channel structures penetrating the stack. The stack includes gate electrodes and insulating layers alternately and repeatedly stacked on the substrate, and extending in a first direction. The channel structures in a first row are spaced apart from each other in the first direction. The stack includes a first sidewall that includes first recessed portions and first protruding portions. Each of first recessed portions is defined by an adjacent pair of the first recessed portions. Each of the first recessed portions has a shape recessed toward a first region of the stack between an adjacent pair of the channel structures of the first row. Each of the first recessed portions has a width that decreases in a direction toward the first region when measured along the first direction.
    Type: Grant
    Filed: July 19, 2019
    Date of Patent: March 10, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Byoungkeun Son, Yoocheol Shin, Changhyun Lee, Hyunjung Kim, Chung-Il Hyun
  • Patent number: 10411031
    Abstract: A semiconductor device includes a substrate, a stack, and channel structures penetrating the stack. The stack includes gate electrodes and insulating layers alternately and repeatedly stacked on the substrate, and extending in a first direction. The channel structures in a first row are spaced apart from each other in the first direction. The stack includes a first sidewall that includes first recessed portions and first protruding portions. Each of first recessed portions is defined by an adjacent pair of the first recessed portions. Each of the first recessed portions has a shape recessed toward a first region of the stack between an adjacent pair of the channel structures of the first row. Each of the first recessed portions has a width that decreases in a direction toward the first region when measured along the first direction.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: September 10, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byoungkeun Son, Yoocheol Shin, Changhyun Lee, Hyunjung Kim, Chung-Il Hyun
  • Publication number: 20190273020
    Abstract: A semiconductor device includes a comprise a substrate including a main zone and an extension zone, vertical channels on the main zone, and an electrode structure including gate electrodes stacked on the substrate. The vertical channel structures extend in a first direction perpendicular to a top surface of the substrate. The gate electrodes include line regions and contact regions. The line regions extend from the main zone toward the extension zone along a second direction the second direction that is perpendicular to the first direction. The contact regions are on ends of the line regions and are thicker than the line regions. A spacing distance in the second direction between the contact regions is greater than a spacing distance in the first direction between the line regions.
    Type: Application
    Filed: May 13, 2019
    Publication date: September 5, 2019
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Chung-Il Hyun, Semee JANG, Sung Yun LEE
  • Patent number: 10312138
    Abstract: A semiconductor device includes a comprise a substrate including a main zone and an extension zone, vertical channels on the main zone, and an electrode structure including gate electrodes stacked on the substrate. The vertical channel structures extend in a first direction perpendicular to a top surface of the substrate. The gate electrodes include line regions and contact regions. The line regions extend from the main zone toward the extension zone along a second direction the second direction that is perpendicular to the first direction. The contact regions are on ends of the line regions and are thicker than the line regions. A spacing distance in the second direction between the contact regions is greater than a spacing distance in the first direction between the line regions.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: June 4, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chung-Il Hyun, Semee Jang, Sung Yun Lee
  • Patent number: 9947686
    Abstract: A semiconductor device includes a substrate, a stack, and channel structures penetrating the stack. The stack includes gate electrodes and insulating layers alternately and repeatedly stacked on the substrate, and extending in a first direction. The channel structures in a first row are spaced apart from each other in the first direction. The stack includes a first sidewall that includes first recessed portions and first protruding portions. Each of first recessed portions is defined by an adjacent pair of the first recessed portions. Each of the first recessed portions has a shape recessed toward a first region of the stack between an adjacent pair of the channel structures of the first row. Each of the first recessed portions has a width that decreases in a direction toward the first region when measured along the first direction.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: April 17, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Byoungkeun Son, Yoocheol Shin, Changhyun Lee, Hyunjung Kim, Chung-Il Hyun
  • Publication number: 20180053686
    Abstract: A semiconductor device includes a comprise a substrate including a main zone and an extension zone, vertical channels on the main zone, and an electrode structure including gate electrodes stacked on the substrate. The vertical channel structures extend in a first direction perpendicular to a top surface of the substrate. The gate electrodes include line regions and contact regions. The line regions extend from the main zone toward the extension zone along a second direction the second direction that is perpendicular to the first direction. The contact regions are on ends of the line regions and are thicker than the line regions. A spacing distance in the second direction between the contact regions is greater than a spacing distance in the first direction between the line regions.
    Type: Application
    Filed: March 23, 2017
    Publication date: February 22, 2018
    Inventors: Chung-IL HYUN, Semee JANG, Sung Yun LEE
  • Patent number: 9627396
    Abstract: A semiconductor device includes a substrate, a stack, and channel structures penetrating the stack. The stack includes gate electrodes and insulating layers alternately and repeatedly stacked on the substrate, and extending in a first direction. The channel structures in a first row are spaced apart from each other in the first direction. The stack includes a first sidewall that includes first recessed portions and first protruding portions. Each of first recessed portions is defined by an adjacent pair of the first recessed portions. Each of the first recessed portions has a shape recessed toward a first region of the stack between an adjacent pair of the channel structures of the first row. Each of the first recessed portions has a width that decreases in a direction toward the first region when measured along the first direction.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: April 18, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byoungkeun Son, Yoocheol Shin, Changhyun Lee, Hyunjung Kim, Chung-Il Hyun
  • Patent number: 8836074
    Abstract: A semiconductor memory device includes linear patterns disposed between isolation trenches extending in a first direction in a semiconductor device and having a first crystal direction the same as the semiconductor substrate. A bridge pattern connects at least two adjacent linear patterns and includes a semiconductor material having a second crystal direction different from the first crystal direction. A first isolation layer pattern is disposed in at least one of the isolation trenches in a field region of the semiconductor substrate. Memory cells are disposed on at least one of the linear patterns.
    Type: Grant
    Filed: December 27, 2012
    Date of Patent: September 16, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byung-Kwan You, Seung-Woo Paek, Chung-Il Hyun, Jung-Dal Choi
  • Patent number: 7799645
    Abstract: An embodiment of a semiconductor device includes a substrate including a cell region and a peripheral region; a cell gate pattern on the cell region; and a peripheral gate pattern on the peripheral region, wherein a first cell insulation layer, a second cell insulation layer, and a third cell insulation layer may be between the substrate and the cell gate pattern, a first peripheral insulation layer, a second peripheral insulation layer, and a third peripheral insulation layer may be between the substrate and the peripheral gate pattern, and the second cell insulation layer and the third cell insulation layer include the same material as the respective second peripheral insulation layer and third peripheral insulation layer.
    Type: Grant
    Filed: September 11, 2008
    Date of Patent: September 21, 2010
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Jung-Dal Choi, Young-Woo Park, Jin-Taek Park, Chung-Il Hyun
  • Publication number: 20090072298
    Abstract: An embodiment of a semiconductor device includes a substrate including a cell region and a peripheral region; a cell gate pattern on the cell region; and a peripheral gate pattern on the peripheral region, wherein a first cell insulation layer, a second cell insulation layer, and a third cell insulation layer may be between the substrate and the cell gate pattern, a first peripheral insulation layer, a second peripheral insulation layer, and a third peripheral insulation layer may be between the substrate and the peripheral gate pattern, and the second cell insulation layer and the third cell insulation layer include the same material as the respective second peripheral insulation layer and third peripheral insulation layer.
    Type: Application
    Filed: September 11, 2008
    Publication date: March 19, 2009
    Inventors: Jung-Dal Choi, Young-Woo Park, Jin-Taek Park, Chung-il Hyun