Patents by Inventor Chung-Jen Cheng Chiang

Chung-Jen Cheng Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7548299
    Abstract: A display panel includes lower and upper glass substrates. The lower glass substrate includes a pixel array having a plurality of pixel units formed thereon, wherein each pixel unit includes a transparent domain and an opaque domain surrounding the transparent domain, and an upward projection is formed in the opaque domain on the lower glass substrate. The upper glass substrate, mounted on the lower glass substrate, has a spacer formed therebeneath and protruded downwardly therefrom for keeping a cell gap between the upper and lower glass substrates, wherein the spacer is fallen in the opaque domain and has a lateral side in collision with the projection on the lower glass substrate to prevent relative displacement between the lower and upper glass substrates.
    Type: Grant
    Filed: February 1, 2008
    Date of Patent: June 16, 2009
    Assignee: Au Optronics Corp.
    Inventors: Kuei-Sheng Tseng, Chung-Jen Cheng Chiang, Chu-Yu Liu, Shyh-Feng Chen
  • Publication number: 20080198317
    Abstract: A display panel includes lower and upper glass substrates. The lower glass substrate includes a pixel array having a plurality of pixel units formed thereon, wherein each pixel unit includes a transparent domain and an opaque domain surrounding the transparent domain, and an upward projection is formed in the opaque domain on the lower glass substrate. The upper glass substrate, mounted on the lower glass substrate, has a spacer formed therebeneath and protruded downwardly therefrom for keeping a cell gap between the upper and lower glass substrates, wherein the spacer is fallen in the opaque domain and has a lateral side in collision with the projection on the lower glass substrate to prevent relative displacement between the lower and upper glass substrates.
    Type: Application
    Filed: February 1, 2008
    Publication date: August 21, 2008
    Inventors: Kuei-Sheng Tseng, Chung-Jen Cheng Chiang, Chu-Yu Liu, Shyh-Feng Chen
  • Patent number: 7352429
    Abstract: A display panel includes lower and upper glass substrates. The lower glass substrate includes a pixel array having a plurality of pixel units formed thereon, wherein each pixel unit includes a transparent domain and an opaque domain surrounding the transparent domain, and an upward projection is formed in the opaque domain on the lower glass substrate. The upper glass substrate, mounted on the lower glass substrate, has a spacer formed therebeneath and protruded downwarly therefrom for keeping a cell gap between the upper and lower glass substrates, wherein the spacer is fallen in the opaque domain and has a lateral side in collision with the projection on the lower glass substrate to prevent relative displacement between the lower and upper glass substrates.
    Type: Grant
    Filed: August 11, 2004
    Date of Patent: April 1, 2008
    Assignee: AU Optronics Corp.
    Inventors: Kuei-Sheng Tseng, Chung-Jen Cheng Chiang, Chu-Yu Liu, Shyh-Feng Chen
  • Publication number: 20050275328
    Abstract: A display panel includes lower and upper glass substrates. The lower glass substrate includes a pixel array having a plurality of pixel units formed thereon, wherein each pixel unit includes a transparent domain and an opaque domain surrounding the transparent domain, and an upward projection is formed in the opaque domain on the lower glass substrate. The upper glass substrate, mounted on the lower glass substrate, has a spacer formed therebeneath and protruded downwarly therefrom for keeping a cell gap between the upper and lower glass substrates, wherein the spacer is fallen in the opaque domain and has a lateral side in collision with the projection on the lower glass substrate to prevent relative displacement between the lower and upper glass substrates.
    Type: Application
    Filed: August 11, 2004
    Publication date: December 15, 2005
    Inventors: Kuei-Sheng Tseng, Chung-Jen Cheng Chiang, Chu-Yu Liu, Shyh-Feng Chen
  • Patent number: 6956396
    Abstract: A testing apparatus for flat-panel display is disclosed. The flat-panel display at least comprises a plurality of electrode lines and a plurality of driving circuits. The driving circuits are used to drive the electrode lines. The driving circuits and the testing apparatus are disposed on the opposite sides of the flat-panel display. The testing apparatus comprises a plurality of switching components and at least one shorting bar. The shorting bar electrically couples to the electrode lines through the switching components. When the switching components are thin film transistor, the switching components further comprise at least one switching line. The switching line electrically couples to the gates of the thin film transistors. The electrode lines are divided into several groups to electrically couple to the shorting bar and the switching line, for example.
    Type: Grant
    Filed: April 9, 2004
    Date of Patent: October 18, 2005
    Assignee: Au Optronics Corporation
    Inventors: Ming-Sheng Lai, Chung-Jen Cheng Chiang, Kuei-Sheng Tseng, Lee-Hsun Chang, Po-Jen Chiang
  • Publication number: 20050146349
    Abstract: A testing apparatus for flat-panel display is disclosed. The flat-panel display at least comprises a plurality of electrode lines and a plurality of driving circuits. The driving circuits are used to drive the electrode lines. The driving circuits and the testing apparatus are disposed on the opposite sides of the flat-panel display. The testing apparatus comprises a plurality of switching components and at least one shorting bar. The shorting bar electrically couples to the electrode lines through the switching components. When the switching components are thin film transistor, the switching components further comprise at least one switching line. The switching line electrically couples to the gates of the thin film transistors. The electrode lines are divided into several groups to electrically couple to the shorting bar and the switching line, for example.
    Type: Application
    Filed: April 9, 2004
    Publication date: July 7, 2005
    Inventors: Ming-Sheng Lai, Chung-Jen Cheng Chiang, Kuei-Sheng Tseng, Lee-Hsun Chang, Po-Jen Chiang