Patents by Inventor Chung-Jung Wu
Chung-Jung Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250054798Abstract: Disclosed are a bonding system and a bonding method. In one embodiment, the bonding system includes a chamber, first and second electrostatic chucks, a visible light sensor module and a nonvisible light module. The chamber is configured to provide a vacuum state. The first electrostatic chuck is configured to hold a first substrate having a first alignment mark in the chamber, wherein the first electrostatic chuck has a first window. The second electrostatic chuck is configured to hold a second substrate having a second alignment mark in the chamber, wherein the second electrostatic chuck has a second window. The visible light sensor module is configured to capture images of the first and the second alignment marks. The nonvisible light module is configured to capture a combined image of the first and second alignment marks via the first and second windows overlapping each other in the vacuum state.Type: ApplicationFiled: August 8, 2023Publication date: February 13, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Ling Hwang, Chung-Jung Wu, Tung Li Wu, Wei-Chih Chen, Hsu-Chin Tseng, Jeng-Nan Hung
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Publication number: 20240404962Abstract: A package structure is provided, and includes a first bonding film formed on a first substrate, and a first alignment mark formed in the first bonding film. The first alignment mark includes a plurality of first patterns spaced apart from each other. The package structure includes a second bonding film formed on a second substrate and bonded to the first bonding film, and a second alignment mark formed in the second bonding film. The second alignment mark includes a plurality of second patterns spaced apart from each other. In a top view, the first alignment mark is spaced apart from the second alignment mark, and the distance between adjacent first patterns is less than the distance between the first alignment mark and the second alignment mark.Type: ApplicationFiled: June 5, 2023Publication date: December 5, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Pei-Hsuan LO, Chih-Ming KE, Jeng-Nan HUNG, Chung-Jung WU, Yu-Yi HUANG
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Publication number: 20240371705Abstract: A wafer bonding apparatus is provided. The wafer bonding apparatus includes a first wafer chuck, a second wafer chuck, and a plurality of bonding pins. The first wafer chuck is configured to hold a first wafer. The second wafer chuck is configured to hold a second wafer. The bonding pins are accommodated in the first wafer chuck and configured to be movable through the first wafer chuck to apply pressure to bend the first wafer, thereby causing bonding contact of the first wafer and the second wafer.Type: ApplicationFiled: May 4, 2023Publication date: November 7, 2024Inventors: Jeng-Nan HUNG, Chen-Hua YU, Tung-Li WU, Chung-Jung WU
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Publication number: 20240330091Abstract: An information handling system may include a processor, one or more audio speakers configured to play back audible audio signals, and a basic input/output system (BIOS) comprising a program of instructions comprising boot firmware configured to be the first code executed by the processor when the information handling system is booted or powered on in order to initialize the information handling system for operation. The BIOS may be further configured to monitor for an error occurring during execution of the BIOS and responsive to an error occurring during execution of the BIOS, cause the one or more audio speakers to play back a sequence of one or more multi-frequency audio signals encoding an identity of the error.Type: ApplicationFiled: March 27, 2023Publication date: October 3, 2024Applicant: Dell Products L.P.Inventors: Huang-Lung CHEN, Daniel L. SMYTHIA, Chia-Wen MA, Chia-Hao CHANG, Chi-Hsiu KAO, Chung-Jung WU
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Publication number: 20240249999Abstract: Semiconductor devices including lids having liquid-cooled channels and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a first integrated circuit die; a lid coupled to the first integrated circuit die, the lid including a plurality of channels in a surface of the lid opposite the first integrated circuit die; a cooling cover coupled to the lid opposite the first integrated circuit die; and a heat transfer unit coupled to the cooling cover through a pipe fitting, the heat transfer unit being configured to supply a liquid coolant to the plurality of channels through the cooling cover.Type: ApplicationFiled: March 15, 2024Publication date: July 25, 2024Inventors: Sheng-Tsung Hsiao, Jen Yu Wang, Chung-Jung Wu, Tung-Liang Shao, Chih-Hang Tung
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Patent number: 11996351Abstract: Semiconductor devices including lids having liquid-cooled channels and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a first integrated circuit die; a lid coupled to the first integrated circuit die, the lid including a plurality of channels in a surface of the lid opposite the first integrated circuit die; a cooling cover coupled to the lid opposite the first integrated circuit die; and a heat transfer unit coupled to the cooling cover through a pipe fitting, the heat transfer unit being configured to supply a liquid coolant to the plurality of channels through the cooling cover.Type: GrantFiled: June 15, 2022Date of Patent: May 28, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Sheng-Tsung Hsiao, Jen Yu Wang, Chung-Jung Wu, Tung-Liang Shao, Chih-Hang Tung
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Publication number: 20240145316Abstract: A bonding tool includes a bonding monitoring system. The bonding monitoring system may include one or more sensors that are configured to generate bonding wave propagation data associated with a bonding operation. As a bond between a top semiconductor substrate and a bottom semiconductor substrate propagates from respective centers to respective perimeters of the top semiconductor substrate and the bottom semiconductor substrate, the one or more sensors of the bonding monitoring system generates the bonding wave propagation data. A controller that communicates with the one or more sensors receives the bonding wave propagation data from the one or more sensors. The controller may monitor the bonding wave propagation based on the bonding wave propagation data and/or may determine various performance parameters of the bonding operation, such as a bonding wave propagation rate and/or a bonding wave propagation uniformity, among other examples.Type: ApplicationFiled: April 10, 2023Publication date: May 2, 2024Inventors: Chung-Jung WU, Jeng-Nan HUNG, Chih-Hang TUNG
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Publication number: 20240136251Abstract: A semiconductor device includes a package and a cooling cover. The package includes a first die having an active surface and a rear surface opposite to the active surface. The rear surface has a cooling region and a peripheral region enclosing the cooling region. The first die includes micro-trenches located in the cooling region of the rear surface. The cooling cover is stacked on the first die. The cooling cover includes a fluid inlet port and a fluid outlet port located over the cooling region and communicated with the micro-trenches.Type: ApplicationFiled: January 4, 2024Publication date: April 25, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chung-Jung Wu, Chih-Hang Tung, Tung-Liang Shao, Sheng-Tsung Hsiao, Jen-Yu Wang
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Patent number: 11955405Abstract: A semiconductor package includes a package substrate; semiconductor devices disposed on the package substrate; a package ring disposed on a perimeter of the package substrate surrounding the semiconductor devices; a cover including silicon bonded to the package ring and covering the semiconductor devices; and a thermal interface structure (TIS) thermally connecting the semiconductor devices to the cover.Type: GrantFiled: January 17, 2022Date of Patent: April 9, 2024Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Jen Yu Wang, Chung-Jung Wu, Sheng-Tsung Hsiao, Tung-Liang Shao, Chih-Hang Tung, Chen-Hua Yu
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Publication number: 20240111342Abstract: An electronic device is provided, and the electronic device includes a base, a cover plate, and a bezel. The base has a sidewall where an opening portion is formed. An airflow selectively passes through the opening portion. The cover plate is pivotally connected to the base. The bezel is movably connected to the cover plate, wherein the bezel is rotated facing the opening portion selectively. The arrangement of the bezel may reduce the gap between the bezel and the down edge of the opening portion of the base, reducing the airflow flowing downward back to the heat-dissipation mechanism in the base. Therefore, the heat-dissipation efficiency of the electronic device is enhanced.Type: ApplicationFiled: December 28, 2022Publication date: April 4, 2024Inventors: Chi-Yu HUNG, Chung-Jung WU, Ying-Sheng ZENG
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Patent number: 11901263Abstract: A semiconductor device includes a package and a cooling cover. The package includes a first die having an active surface and a rear surface opposite to the active surface. The rear surface has a cooling region and a peripheral region enclosing the cooling region. The first die includes micro-trenches located in the cooling region of the rear surface. The cooling cover is stacked on the first die. The cooling cover includes a fluid inlet port and a fluid outlet port located over the cooling region and communicated with the micro-trenches.Type: GrantFiled: March 15, 2023Date of Patent: February 13, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chung-Jung Wu, Chih-Hang Tung, Tung-Liang Shao, Sheng-Tsung Hsiao, Jen-Yu Wang
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Publication number: 20230420337Abstract: Cooling covers including trapezoidal cooling chambers for cooling packaged semiconductor devices and methods of forming the same are disclosed. In an embodiment, a cooling cover for a semiconductor device includes an inlet; an outlet; and a cooling chamber in fluid communication with the inlet and the outlet, the cooling chamber having a trapezoidal shape in a cross-sectional view.Type: ApplicationFiled: June 27, 2022Publication date: December 28, 2023Inventors: Chung-Jung Wu, Sheng-Tsung Hsiao, Jen Yu Wang, Tung-Liang Shao, Chih-Hang Tung
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Patent number: 11811398Abstract: The present application relates to a method of operating a capacitance sensing device comprises: calculating a difference of a raw data compared to one of the raw data received in a previous data frame; and performing a comparison calculation based on the raw data and a stored baseline value to determine whether a proximity event has occurred. Under the proximity event, selects one of several baseline value update procedures based on the magnitude of the difference. Thus, the present application effectively avoids the problem of failure to update the baseline value when the object is close to the capacitance sensing device for a long period of time, which may lead to misjudgment of the capacitance sensing device.Type: GrantFiled: April 1, 2021Date of Patent: November 7, 2023Assignee: Sensortek Technology CorpInventors: Wang-An Lin, Chung-Jung Wu, Chun-Lun Wang
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Publication number: 20230223318Abstract: A semiconductor device includes a package and a cooling cover. The package includes a first die having an active surface and a rear surface opposite to the active surface. The rear surface has a cooling region and a peripheral region enclosing the cooling region. The first die includes micro-trenches located in the cooling region of the rear surface. The cooling cover is stacked on the first die. The cooling cover includes a fluid inlet port and a fluid outlet port located over the cooling region and communicated with the micro-trenches.Type: ApplicationFiled: March 15, 2023Publication date: July 13, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chung-Jung Wu, Chih-Hang Tung, Tung-Liang Shao, Sheng-Tsung Hsiao, Jen-Yu Wang
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Patent number: 11699996Abstract: The present invention is related to a method for proximity sensing and an applied electronic device thereof. The present invention provides that a movement signal is generated according to a detection data, a move baseline data and a move threshold and cooperated with a proximity signal for generating a judgement signal to judge if the human body or the object body is close to the electronic device.Type: GrantFiled: April 5, 2021Date of Patent: July 11, 2023Assignee: Sensortek Technology Corp.Inventors: Wang-An Lin, Ming-Che Yang, Kai Fan Hsieh, Chung-Jung Wu
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Patent number: 11631629Abstract: A semiconductor device includes a package and a cooling cover. The package includes a first die having an active surface and a rear surface opposite to the active surface. The rear surface has a cooling region and a peripheral region enclosing the cooling region. The first die includes micro-trenches located in the cooling region of the rear surface. The cooling cover is stacked on the first die. The cooling cover includes a fluid inlet port and a fluid outlet port located over the cooling region and communicated with the micro-trenches.Type: GrantFiled: April 28, 2022Date of Patent: April 18, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chung-Jung Wu, Chih-Hang Tung, Tung-Liang Shao, Sheng-Tsung Hsiao, Jen-Yu Wang
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Patent number: 11569147Abstract: A method of forming a semiconductor package is provided. The method includes forming a metallization stack over a semiconductor die. Polymer particles are mounted over the metallization stack. Each of the polymer particles is coated with a first bonding layer. A heat spreader lid is bonded with the semiconductor die by reflowing the first bonding layer. A composite thermal interface material (TIM) structure is formed between the heat spreader lid and the semiconductor die during the bonding. The composite TIM structure includes the first bonding layer and the polymer particles embedded in the first bonding layer.Type: GrantFiled: August 25, 2021Date of Patent: January 31, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tung-Liang Shao, Jen-Yu Wang, Chung-Jung Wu, Chih-Hang Tung, Chen-Hua Yu
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Publication number: 20230007912Abstract: A semiconductor package includes a package substrate; semiconductor devices disposed on the package substrate; a package ring disposed on a perimeter of the package substrate surrounding the semiconductor devices; a cover including silicon bonded to the package ring and covering the semiconductor devices; and a thermal interface structure (TIS) thermally connecting the semiconductor devices to the cover.Type: ApplicationFiled: January 17, 2022Publication date: January 12, 2023Inventors: Jen Yu WANG, Chung-Jung WU, Sheng-Tsung HSIAO, Tung-Liang SHAO, Chih-Hang TUNG, Chen-Hua YU
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Publication number: 20220310482Abstract: Semiconductor devices including lids having liquid-cooled channels and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a first integrated circuit die; a lid coupled to the first integrated circuit die, the lid including a plurality of channels in a surface of the lid opposite the first integrated circuit die; a cooling cover coupled to the lid opposite the first integrated circuit die; and a heat transfer unit coupled to the cooling cover through a pipe fitting, the heat transfer unit being configured to supply a liquid coolant to the plurality of channels through the cooling cover.Type: ApplicationFiled: June 15, 2022Publication date: September 29, 2022Inventors: Sheng-Tsung Hsiao, Jen Yu Wang, Chung-Jung Wu, Tung-Liang Shao, Chih-Hang Tung
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Publication number: 20220262705Abstract: A semiconductor device includes a package and a cooling cover. The package includes a first die having an active surface and a rear surface opposite to the active surface. The rear surface has a cooling region and a peripheral region enclosing the cooling region. The first die includes micro-trenches located in the cooling region of the rear surface. The cooling cover is stacked on the first die. The cooling cover includes a fluid inlet port and a fluid outlet port located over the cooling region and communicated with the micro-trenches.Type: ApplicationFiled: April 28, 2022Publication date: August 18, 2022Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chung-Jung Wu, Chih-Hang Tung, Tung-Liang Shao, Sheng-Tsung Hsiao, Jen-Yu Wang