Patents by Inventor CHUNG-KAI HUANG

CHUNG-KAI HUANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240154021
    Abstract: A p-GaN high-electron-mobility transistor (HEMT) includes a buffer layer stacked on a substrate, a channel layer stacked on the buffer layer, a supply layer stacked on the channel layer, a doped layer stacked on the supply layer, and a hydrogen barrier layer covering the supply layer and the doped layer. A source and a drain are electrically connected to the channel layer and the supply layer, respectively. A gate is located on the doped layer. The hydrogen barrier layer is doped with fluorine.
    Type: Application
    Filed: December 29, 2022
    Publication date: May 9, 2024
    Inventors: TING-CHANG CHANG, Wei-Chen Huang, Shih-Kai Lin, Yong-Ci Zhang, Sheng-Yao Chou, Chung-Wei Wu, Po-Hsun Chen
  • Publication number: 20240096628
    Abstract: A photo mask includes a plurality of device features, a first assist feature, and a second assist feature. The device features are in a patterning region of a device region. The first assist feature are in the patterning region and adjacent to the device features. The first assist feature is for correcting an optical proximity effect in a photolithography process. The second assist feature is in a non-patterning region of the device region. The second assist feature is a sub-resolution correction feature, and a first distance between the second assist feature and one of the device features closest to the second assist feature is greater than a second distance between adjacent two of the device features.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 21, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Bao-Chin LI, Chung-Kai HUANG, Ko-Pin KAO, Ching-Yen HSAIO
  • Patent number: 11854808
    Abstract: A photo mask includes a plurality of device features, a first assist feature, and a second assist feature. The device features are in a patterning region of a device region. The first assist feature are in the patterning region and adjacent to the device features. The first assist feature is for correcting an optical proximity effect in a photolithography process. The second assist feature is in a non-patterning region of the device region. The second assist feature is a sub-resolution correction feature, and a first distance between the second assist feature and one of the device features closest to the second assist feature is greater than a second distance between adjacent two of the device features.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Bao-Chin Li, Chung-Kai Huang, Ko-Pin Kao, Ching-Yen Hsaio
  • Publication number: 20230261083
    Abstract: A method of manufacturing a semiconductor device includes providing a substrate. A channel layer is formed on the substrate. A barrier layer is formed on the channel layer. A source and a drain are formed on the barrier layer. A recess is formed in the barrier layer, in which the recess has a bottom surface, and a portion of the barrier underneath the recess has a thickness. A first dielectric layer is formed to cover the bottom surface of the recess. A charge trapping layer is formed on the first dielectric layer. A first ferroelectric material layer is formed on the charge trapping layer. A second dielectric layer is formed on the first ferroelectric material layer. A second ferroelectric material layer is formed on the second dielectric layer. A gate is formed over the second ferroelectric material layer.
    Type: Application
    Filed: April 20, 2023
    Publication date: August 17, 2023
    Inventors: Edward Yi CHANG, Shih-Chien LIU, Chung-Kai HUANG, Chia-Hsun WU, Ping-Cheng HAN, Yueh-Chin LIN, Ting-En HSIEH
  • Patent number: 11670699
    Abstract: A semiconductor device includes a substrate, a channel layer, a barrier layer, a ferroelectric composite material layer, a gate, a source and a drain. The channel layer and the barrier layer having a recess are disposed on the substrate in sequence. The ferroelectric composite material layer including a first dielectric layer, a charge trapping layer, a first ferroelectric material layer, a second dielectric layer and a second ferroelectric material layer is disposed in the recess. The gate is disposed on the ferroelectric composite material layer. The source and the drain are disposed on the barrier layer.
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: June 6, 2023
    Assignee: NATIONAL YANG MING CHIAO TUNG UNIVERSITY
    Inventors: Edward Yi Chang, Shih-Chien Liu, Chung-Kai Huang, Chia-Hsun Wu, Ping-Cheng Han, Yueh-Chin Lin, Ting-En Hsieh
  • Publication number: 20230066993
    Abstract: A photo mask includes a plurality of device features, a first assist feature, and a second assist feature. The device features are in a patterning region of a device region. The first assist feature are in the patterning region and adjacent to the device features. The first assist feature is for correcting an optical proximity effect in a photolithography process. The second assist feature is in a non-patterning region of the device region. The second assist feature is a sub-resolution correction feature, and a first distance between the second assist feature and one of the device features closest to the second assist feature is greater than a second distance between adjacent two of the device features.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Bao-Chin LI, Chung-Kai HUANG, Ko-Pin KAO, Ching-Yen HSAIO
  • Publication number: 20200203499
    Abstract: A semiconductor device includes a substrate, a channel layer, a barrier layer, a ferroelectric composite material layer, a gate, a source and a drain. The channel layer and the barrier layer having a recess are disposed on the substrate in sequence. The ferroelectric composite material layer including a first dielectric layer, a charge trapping layer, a first ferroelectric material layer, a second dielectric layer and a second ferroelectric material layer is disposed in the recess. The gate is disposed on the ferroelectric composite material layer. The source and the drain are disposed on the barrier layer.
    Type: Application
    Filed: March 4, 2020
    Publication date: June 25, 2020
    Inventors: Edward Yi CHANG, Shih-Chien LIU, Chung-Kai HUANG, Chia-Hsun WU, Ping-Cheng HAN, Yueh-Chin LIN, Ting-En HSIEH
  • Publication number: 20180175185
    Abstract: A semiconductor device includes a substrate, a channel layer, a barrier layer, a recess, a charge trapping layer, a ferroelectric material layer, a gate, a source and a drain. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The barrier layer has a recess, and a portion of the barrier layer under the recess has a thickness. The source and the drain are disposed on the barrier layer. The charge trapping layer covers the bottom of the recess. The ferroelectric material is disposed on the charge trapping layer. The gate is disposed on the ferroelectric material.
    Type: Application
    Filed: July 10, 2017
    Publication date: June 21, 2018
    Inventors: Edward Yi CHANG, Shih-Chien LIU, Chung-Kai HUANG, Chia-Hsun WU, Ping-Cheng HAN, Yueh-Chin LIN, Ting-En HSIEH
  • Patent number: 9144707
    Abstract: The present invention relates to exercisers having information management system comprising a main frame of the exerciser, a measuring module, a signal processing module and an identifier generating module. The measuring module measures the movement of the exerciser and/or the physical status of the user and collects signals from the equipment and/or user. The signal processing module processes the signals received and then generates fitness information and/or physical information. The identifier generating module converts the information into an identifier and displays on a monitor. The user can easily obtain the identifier by using mobile devices, without printing, for him or her to save, manage and utilize the information.
    Type: Grant
    Filed: August 1, 2013
    Date of Patent: September 29, 2015
    Assignee: FOOTWEAR & RECREATION TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Pao-Pao Liu, David Lai, Chiu-Chieh Chen, Ching-Yu Chuang, Chung-Kai Huang
  • Publication number: 20140113769
    Abstract: The present invention relates to exercisers having information management system comprising a main frame of the exerciser, a measuring module, a signal processing module and an identifier generating module. The measuring module measures the movement of the exerciser and/or the physical status of the user and collects signals from the equipment and/or user. The signal processing module processes the signals received and then generates fitness information and/or physical information. The identifier generating module converts the information into an identifier and displays on a monitor. The user can easily obtain the identifier by using mobile devices, without printing, for him or her to save, manage and utilize the information.
    Type: Application
    Filed: August 1, 2013
    Publication date: April 24, 2014
    Applicant: FOOTWEAR & RECREATION TECHNOLOGY RESEARCH INSTITUTE
    Inventors: PAO-PAO LIU, DAVID LAI, CHIU-CHIEH CHEN, CHING-YU CHUANG, CHUNG-KAI HUANG