Abstract: An electronic device includes a sensor, a processor, and a memory configured to store at least one instruction executed by the processor, wherein the processor is configured to collect activity information on a user related to the electronic device by using the sensor, the collecting of the activity information including creating an amount of activity of the user for a specific goal or an activity engagement level for the specific goal by using the activity information, adjust at least one of an output time point, an output cycle, the number of outputs, or the output contents of the activity guide information for the user to an activity guide parameter at least based on the amount of activity or the activity engagement level, and output the activity guide information created by using the adjusted activity guide parameter through an output device operatively connected to the processor.

Abstract: A method of testing a semiconductor memory device is provided. Data is written to a plurality of memory cells disposed in a memory cell block of the semiconductor memory device. A first driving voltage is applied to a first group of word lines. A second driving voltage is applied to a second group of word lines. Each word line of the first group of the word lines is interposed between two neighboring word lines of the second group of the word lines. The first driving voltage has a voltage level different from that of the second driving voltage. The data is read from first memory cells coupled to the first group to determine whether each of the first memory cells is defective.

Abstract: An electronic device includes a sensor, a processor, and a memory configured to store at least one instruction executed by the processor, wherein the processor is configured to collect activity information on a user related to the electronic device by using the sensor, the collecting of the activity information including creating an amount of activity of the user for a specific goal or an activity engagement level for the specific goal by using the activity information, adjust at least one of an output time point, an output cycle, the number of outputs, or the output contents of the activity guide information for the user to an activity guide parameter at least based on the amount of activity or the activity engagement level, and output the activity guide information created by using the adjusted activity guide parameter through an output device operatively connected to the processor.

Abstract: A method of testing a semiconductor memory device is provided. Data is written to a plurality of memory cells disposed in a memory cell block of the semiconductor memory device. A first driving voltage is applied to a first group of word lines. A second driving voltage is applied to a second group of word lines. Each word line of the first group of the word lines is interposed between two neighboring word lines of the second group of the word lines. The first driving voltage has a voltage level different from that of the second driving voltage. The data is read from first memory cells coupled to the first group to determine whether each of the first memory cells is defective.

Abstract: A multiple well bias memory device that includes a semiconductor substrate; a first well of a first conductivity type formed in the semiconductor substrate and having a memory cell formed therein; and a second well of the first conductivity type formed in the semiconductor substrate and having formed therein a sense amplifier configured to sense and amplify data from the memory cell. The first and second wells have different doping concentrations and are biased to first and second voltages, respectively. The first voltage being lower than the second voltage.

Abstract: A method of testing a semiconductor memory device is provided. Data is written to a plurality of memory cells disposed in a memory cell block of the semiconductor memory device. A first driving voltage is applied to a first group of word lines. A second driving voltage is applied to a second group of word lines. Each word line of the first group of the word lines is interposed between two neighboring word lines of the second group of the word lines. The first driving voltage has a voltage level different from that of the second driving voltage. The data is read from first memory cells coupled to the first group to determine whether each of the first memory cells is defective.

Abstract: A multiple well bias memory device that includes a semiconductor substrate; a first well of a first conductivity type formed in the semiconductor substrate and having a memory cell formed therein; and a second well of the first conductivity type formed in the semiconductor substrate and having formed therein a sense amplifier configured to sense and amplify data from the memory cell. The first and second wells have different doping concentrations and are biased to first and second voltages, respectively. The first voltage being lower than the second voltage.

Abstract: Disclosed a method and device for detecting a shape of a sheet roll. The method for detecting a shape of a sheet roll comprises positioning a camera on a cylindrical side surface of the sheet roll; photographing a cylindrical side surface while rotating the camera along the cylindrical side surface of a sheet roll; and determining whether there is a defect in a shape of a winding roll by analyzing a pattern of an image acquired by photographing.

Abstract: A semiconductor memory device and a control signal generating method thereof. The semiconductor memory device may include a voltage range detector configured to generate a voltage detecting signal corresponding to a range of a level of an external power voltage. A control signal generating portion may be used to generate a control signal corresponding to the range of the level of the external power voltage responsive to the voltage detecting signal. As a result, the semiconductor memory device can perform an operation for satisfying an access time characteristic according to a specification responsive to the control signal.

Abstract: A semiconductor memory device and a control signal generating method thereof. The semiconductor memory device may include a voltage range detector configured to generate a voltage detecting signal corresponding to a range of a level of an external power voltage. A control signal generating portion may be used to generate a control signal corresponding to the range of the level of the external power voltage responsive to the voltage detecting signal. As a result, the semiconductor memory device can perform an operation for satisfying an access time characteristic according to a specification responsive to the control signal.