Patents by Inventor Chung Koo Yoon

Chung Koo Yoon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7256594
    Abstract: A test system for a semiconductor device couples the device to the back side of a circuit board, thereby allowing the device to be tested under actual operating conditions while providing adequate clearance around the device to accommodate automatic handling equipment, and also reducing signal delay and distortion. A system in accordance with the present invention includes a circuit board having circuitry adapted to provide an actual operating environment for the semiconductor device, as for example, a low cost mother board for testing memory devices. The device is coupled to the back side of the circuit board through test terminals formed on the back side of the board. An interface board can be used to correct the pin arrangements, which are reversed because they protrude from the back side of the board, and to compensate for the environmental differences caused by use of sockets and additional equipment on the interface board.
    Type: Grant
    Filed: June 23, 2004
    Date of Patent: August 14, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-Nyun Kim, Sun-Ju Kim, Jong-Hyun Kim, Chung-Koo Yoon, Sang-Jun Park
  • Patent number: 7075325
    Abstract: Semiconductor devices are tested under actual operating conditions by interfacing the devices to an actual board-type product, for example, through a test board tat includes a mounting unit such as a socket or pattern of conductive lands that allows the devices being tested to be mounted to and removed from the test board with minimal effort and signal degradation. An interface circuit on the test board compensates for environmental differences between the board-type product and the mounting unit. For example, the interface circuit can include a clock distribution circuit, which utilizes a phase locked loop, and a register circuit to compensate for electrical loading caused by the device mounting unit, and to provide the proper timing margins between clock signals and control signals applied to the semiconductor devices. A power control circuit can be used to manipulate the supply voltage thereby providing a voltage margin screening function.
    Type: Grant
    Filed: November 3, 2004
    Date of Patent: July 11, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Jun Park, Chang-Nyun Kim, Hyun-Ho Park, Nam-Sik Jeong, Jong-Hyun Kim, Chung-Koo Yoon
  • Publication number: 20050057272
    Abstract: A method and apparatus for testing semiconductor devices allows devices to be tested under actual operating conditions by interfacing the devices to an actual board-type product. The semiconductor devices are interfaced to the board-type product with a test board that includes a mounting unit such as a socket or pattern of conductive lands that allows the devices being tested can be easily mounted to and removed from the test board with minimal effort and signal degradation. An interface circuit on the test board compensates for environmental differences between the board-type product and the mounting unit. For example, the interface circuit can include a clock distribution circuit, which utilizes a phase locked loop, and a register circuit to compensate for electrical loading caused by the device mounting unit, and to provide the proper timing margins between clock signals and control signals applied to the semiconductor devices.
    Type: Application
    Filed: November 3, 2004
    Publication date: March 17, 2005
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sang-Jun Park, Chang-Nyun Kim, Hyun-Ho Park, Nam-Sik Jeong, Jong-Hyun Kim, Chung-Koo Yoon
  • Patent number: 6833721
    Abstract: Embodiments of the invention allow semiconductor devices to be tested under actual operating conditions by interfacing the devices to an actual board-type product. The devices are interfaced to the board-type product with a test board that includes a mounting unit such as a socket or pattern of conductive lands that allows the devices to be easily mounted to and removed from the test board with minimal effort and signal degradation. An interface circuit on the test board compensates for environmental differences between the board-type product and the mounting unit. A power control circuit can be used to manipulate the supply voltage applied to the semiconductor devices, thereby providing a voltage margin screening function.
    Type: Grant
    Filed: December 8, 2000
    Date of Patent: December 21, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Jun Park, Chang-Nyun Kim, Hyun-Ho Park, Nam-Sik Jeong, Jong-Hyun Kim, Chung-Koo Yoon
  • Publication number: 20040232938
    Abstract: A test system for a semiconductor device couples the device to the back side of a circuit board, thereby allowing the device to be tested under actual operating conditions while providing adequate clearance around the device to accommodate automatic handling equipment, and also reducing signal delay and distortion. A system in accordance with the present invention includes a circuit board having circuitry adapted to provide an actual operating environment for the semiconductor device, as for example, a low cost mother board for testing memory devices. The device is coupled to the back side of the circuit board through test terminals formed on the back side of the board. An interface board can be used to correct the pin arrangements, which are reversed because they protrude from the back side of the board, and to compensate for the environmental differences caused by use of sockets and additional equipment on the interface board.
    Type: Application
    Filed: June 23, 2004
    Publication date: November 25, 2004
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Chang-Nyun Kim, Sun-Ju Kim, Jong-Hyun Kim, Chung-Koo Yoon, Sang-Jun Park
  • Patent number: 6771088
    Abstract: A test system for a semiconductor device couples the device to the back side of a circuit board, thereby allowing the device to be tested under actual operating conditions while providing adequate clearance around the device to accommodate automatic handling equipment, and also reducing signal delay and distortion. A system in accordance with the present invention includes a circuit board having circuitry adapted to provide an actual operating environment for the semiconductor device, as for example, a low cost mother board for testing memory devices. The device is coupled to the back side of the circuit board through test terminals formed on the back side of the board. An interface board can be used to correct the pin arrangements, which are reversed because they protrude from the back side of the board, and to compensate for the environmental differences caused by use of sockets and additional equipment on the interface board.
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: August 3, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-Nyun Kim, Sun-Ju Kim, Jong-Hyun Kim, Chung-Koo Yoon, Sang-Jun Park
  • Patent number: 6335629
    Abstract: A testing module for use in testing a semiconductor chip for failures in its integrated circuits includes a test fixture, and a decapsulated semiconductor device package mounted to the fixture. The semiconductor device package includes a semiconductor chip having an active front surface at which the integrated circuits are formed, a back which is opposed to the active front, a plurality of leads for electrically connecting the semiconductor chip to an external apparatus, and a package body having a backside which is decapsulated so as to expose the back of the semiconductor chip. The test fixture includes a fixture body having a loading surface contacting the front of the package body and supporting the semiconductor device package, a cover which has an opening through which the back of the semiconductor chip is exposed, and a plurality of projections contacting the leads of the semiconductor device package.
    Type: Grant
    Filed: July 15, 1998
    Date of Patent: January 1, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang Sik Lee, Kye Won Ha, Jong Wook Kim, Chung Koo Yoon
  • Publication number: 20010034865
    Abstract: A method and apparatus for testing semiconductor devices allows devices to be tested under actual operating conditions by interfacing the devices to an actual board-type product. The semiconductor devices are interfaced to the board-type product with a test board that includes a mounting unit such as a socket or pattern of conductive lands that allows the devices being tested can be easily mounted to and removed from the test board with minimal effort and signal degradation. An interface circuit on the test board compensates for environmental differences between the board-type product and the mounting unit. For example, the interface circuit can include a clock distribution circuit, which utilizes a phase locked loop, and a register circuit to compensate for electrical loading caused by the device mounting unit, and to provide the proper timing margins between clock signals and control signals applied to the semiconductor devices.
    Type: Application
    Filed: December 8, 2000
    Publication date: October 25, 2001
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sang-Jun Park, Chang-Nyun Kim, Hyun-Ho Park, Nam-Sik Jeong, Jong-Hyun Kim, Chung-Koo Yoon
  • Publication number: 20010033181
    Abstract: A test system for a semiconductor device couples the device to the back side of a circuit board, thereby allowing the device to be tested under actual operating conditions while providing adequate clearance around the device to accommodate automatic handling equipment, and also reducing signal delay and distortion. A system in accordance with the present invention includes a circuit board having circuitry adapted to provide an actual operating environment for the semiconductor device, as for example, a low cost mother board for testing memory devices. The device is coupled to the back side of the circuit board through test terminals formed on the back side of the board. An interface board can be used to correct the pin arrangements, which are reversed because they protrude from the back side of the board, and to compensate for the environmental differences caused by use of sockets and additional equipment on the interface board.
    Type: Application
    Filed: December 28, 2000
    Publication date: October 25, 2001
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Chang-Nyun Kim, Sun-Ju Kim, Jong-Hyun Kim, Chung-Koo Yoon, Sang-Jun Park