Patents by Inventor Chung-Li Chao

Chung-Li Chao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Pixel structure, display panel and method for fabricating pixel structure
    Patent number: 9035317
    Abstract: A pixel structure disposed on a substrate is provided. The pixel structure includes a gate electrode, a first gate insulation layer, a pixel electrode, a second gate insulation layer, a channel layer, a source electrode, a drain electrode and a common electrode. The gate electrode is disposed on the substrate and covered by the first gate insulation layer. The pixel electrode is disposed on the first gate insulation layer and covered by the second gate insulation layer. The pixel electrode is located between the first and the second gate insulation layers. The second gate insulation layer has a first contact opening exposing a portion of the pixel electrode. The channel layer is disposed on the second gate insulation layer. The drain electrode electrically connected to the pixel electrode. The source electrode is disposed on the second gate insulation layer. The common electrode is disposed on the second gate insulation layer.
    Type: Grant
    Filed: September 2, 2013
    Date of Patent: May 19, 2015
    Assignee: Au Optronics Corporation
    Inventors: Shu-Ming Huang, Yi-Ji Tsai, Chung-Li Chao, Wan-Jung Tseng
  • PIXEL STRUCTURE, DISPLAY PANEL AND METHOD FOR FABRICATING PIXEL STRUCTURE
    Publication number: 20140339563
    Abstract: A pixel structure disposed on a substrate is provided. The pixel structure includes a gate electrode, a first gate insulation layer, a pixel electrode, a second gate insulation layer, a channel layer, a source electrode, a drain electrode and a common electrode. The gate electrode is disposed on the substrate and covered by the first gate insulation layer. The pixel electrode is disposed on the first gate insulation layer and covered by the second gate insulation layer. The pixel electrode is located between the first and the second gate insulation layers. The second gate insulation layer has a first contact opening exposing a portion of the pixel electrode. The channel layer is disposed on the second gate insulation layer. The drain electrode electrically connected to the pixel electrode. The source electrode is disposed on the second gate insulation layer. The common electrode is disposed on the second gate insulation layer.
    Type: Application
    Filed: September 2, 2013
    Publication date: November 20, 2014
    Applicant: Au Optronics Corporation
    Inventors: Shu-Ming Huang, Yi-Ji Tsai, Chung-Li Chao, Wan-Jung Tseng