Patents by Inventor Chung-Ming Hsieh

Chung-Ming Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6828649
    Abstract: The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the same. In one advantageous embodiment, the semiconductor device includes a doped layer located over a semiconductor substrate, and an isolation trench located in the doped layer and having a dielectric layer located on a sidewall thereof. The semiconductor device may further include a conductive material located within the isolation trench and an interconnect that electrically connects the conductive material and the doped layer.
    Type: Grant
    Filed: May 7, 2002
    Date of Patent: December 7, 2004
    Assignee: Agere Systems Inc.
    Inventors: John C. Desko, Thomas J. Krutsick, Chung-Ming Hsieh, Brian E. Thompson, Bailey Jones, Steve Wallace
  • Patent number: 6790753
    Abstract: A Schottky diode is fabricated by a sequence of fabrication by a sequence of fabrication steps. An active region of a semiconductor substrate is defined in which a Schottky diode is fabricated. At least first and second layers of insulating material are applied over the active area. A first layer of insulating material, having a first etching rate, is applied over the active area. A second layer of insulating material having a second, greater, etch rate is applied over the first layer of insulating material to a thickness that is about twice the thickness of the first layer of insulating material. The insulating material is patterned and a window is etched through the layers of insulating material to the semiconductor substrate. Metal is applied and unwanted metal is etched away leaving metal in the window forming a Schottky contact therein. One or more barrier layers may be employed.
    Type: Grant
    Filed: October 29, 2003
    Date of Patent: September 14, 2004
    Assignee: Agere Systems Inc
    Inventors: John Charles Desko, Michael J Evans, Chung-Ming Hsieh, Tzu-Yen Hsieh, Bailey R Jones, Thomas J. Krutsick, John Michael Siket, Jr., Brian Eric Thompson, Steven W. Wallace
  • Publication number: 20040171038
    Abstract: The invention provides methods and compositions relating to identification and use of genetic information from the IL-1 gene cluster—including the structure and organization of novel IL-1-like genes found within the IL-1 locus as well as polymorphisms and associated haplotypes within these genes. The invention thereby expands the repertoire of useful genetic information available from the IL-1 locus—which contains the previously-identified IL-1&agr;, IL-1&bgr; and IL-1RN genes, for predicting IL-1 associated phenotypes (e.g. increased or decreased risks of inflammatory disease) and for treating IL-1 haplotype associated inflammatory phenotypes.
    Type: Application
    Filed: November 17, 2003
    Publication date: September 2, 2004
    Inventors: Martin Nicklin, Gordon Duff, Kenneth Kornman, Maryam Rafie Kolpin, Chung-Ming Hsieh, Raju Govindaraju, Nazneen Aziz
  • Patent number: 6737311
    Abstract: The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the semiconductor device. The semiconductor device may include a well doped with a P-type dopant located over a semiconductor substrate. The semiconductor device may further include a buried layer including the P-type dopant located between the well and the semiconductor substrate, and a gate located over the well.
    Type: Grant
    Filed: September 26, 2001
    Date of Patent: May 18, 2004
    Assignee: Agere Systems Inc.
    Inventors: John Desko, Chung-Ming Hsieh, Bailey Jones, Thomas J. Krutsick, Brian Thompson, Steve Wallace
  • Publication number: 20040089908
    Abstract: A Schottky diode is fabricated by a sequence of fabrication by a sequence of fabrication steps. An active region of a semiconductor substrate is defined in which a Schottky diode is fabricated. At least first and second layers of insulating material are applied over the active area. A first layer of insulating material, having a first etching rate, is applied over the active area. A second layer of insulating material having a second, greater, etch rate is applied over the first layer of insulating material to a thickness that is about twice the thickness of the first layer of insulating material. The insulating material is patterned and a window is etched through the layers of insulating material to the semiconductor substrate. Metal is applied and unwanted metal is etched away leaving metal in the window forming a Schottky contact therein. One or more barrier layers may be employed.
    Type: Application
    Filed: October 29, 2003
    Publication date: May 13, 2004
    Inventors: John Charles Desko, Michael J. Evans, Chung-Ming Hsieh, Tzu-Yen Hsieh, Bailey R. Jones, Thomas J. Krutsick, John Michael Siket, Brian Eric Thompson, Steven W. Wallace
  • Patent number: 6690037
    Abstract: A Schottky diode is fabricated by a sequence of fabrication by a sequence of fabrication steps. An active region of a semiconductor substrate is defined in which a Schottky diode is fabricated. At least first and second layers of insulating material are applied over the active area. A first layer of insulating material, having a first etching rate, is applied over the active area. A second layer of insulating material having a second, greater, etch rate is applied over the first layer of insulating material to a thickness that is about twice the thickness of the first layer of insulating material. The insulating material is patterned and a window is etched through the layers of insulating material to the semiconductor substrate. Metal is applied and unwanted metal is etched away leaving metal in the window forming a Schottky contact therein. One or more barrier layers may be employed.
    Type: Grant
    Filed: August 31, 2000
    Date of Patent: February 10, 2004
    Assignee: Agere Systems Inc.
    Inventors: John Charles Desko, Michael J Evans, Chung-Ming Hsieh, Tzu-Yen Hsieh, Bailey R Jones, Thomas J. Krutsick, John Michael Siket, Jr., Brian Eric Thompson, Steven W. Wallace
  • Publication number: 20030235890
    Abstract: The invention provides methods and reagents for detecting a polymorphism associated with in an upstream region of the interleukin-1 beta (IL-B) gene (IL-1B (−3737)) that affects transcription of the gene and susceptibility to inflammatory and infectious diseases such as periodontal disease and Alzheimer's disease.
    Type: Application
    Filed: November 19, 2002
    Publication date: December 25, 2003
    Inventors: David Wyllie, Gordon Duff, Nazneen Aziz, Chung-Ming Hsieh, Kenneth Kornman
  • Publication number: 20030209776
    Abstract: The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the same. In one advantageous embodiment, the semiconductor device includes a doped layer located over a semiconductor substrate, and an isolation trench located in the doped layer and having a dielectric layer located on a sidewall thereof. The semiconductor device may further include a conductive material located within the isolation trench and an interconnect that electrically connects the conductive material and the doped layer.
    Type: Application
    Filed: May 7, 2002
    Publication date: November 13, 2003
    Applicant: Agere Systems Inc.
    Inventors: John C. Desko, Thomas J. Krutsick, Chung-Ming Hsieh, Brian E. Thompson, Bailey Jones, Steve Wallace
  • Publication number: 20030211701
    Abstract: The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the same. In one advantageous embodiment the semiconductor device includes a doped layer located over a semiconductor substrate and an isolation trench located in the doped layer. The isolation trench may further include a bottom surface and a sidewall. Additionally, the semiconductor device may include a dopant barrier layer located on the sidewall and a doped region located in the bottom surface.
    Type: Application
    Filed: May 7, 2002
    Publication date: November 13, 2003
    Applicant: Agere Systems Inc.
    Inventors: John C. Desko, Thomas J. Krutsick, Chung-Ming Hsieh, Brian E. Thompson, Bailey Jones, Steve Wallace
  • Publication number: 20030141566
    Abstract: The present invention provides a method of manufacturing a semiconductor device. The method may include forming first and second adjacent tubs in an epitaxial layer, and simultaneously forming a base region in the first tub and lightly doped drain (LDD) regions in the second tub adjacent a first gate located over the second tub. The method may also include simultaneously forming a base contact region and a source/drain contact region.
    Type: Application
    Filed: January 25, 2002
    Publication date: July 31, 2003
    Applicant: Agere Systems Guardian Corp.
    Inventors: John C. Desko, Chung-Ming Hsieh, Bailey Jones, Thomas J. Krutsick, Brian E. Thompson, Steve Wallace
  • Publication number: 20030057494
    Abstract: The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the semiconductor device. The semiconductor device may include a well doped with a P-type dopant located over a semiconductor substrate. The semiconductor device may further include a buried layer including the P-type dopant located between the well and the semiconductor substrate, and a gate located over the well.
    Type: Application
    Filed: September 26, 2001
    Publication date: March 27, 2003
    Inventors: John Desko, Chung-Ming Hsieh, Bailey Jones, Thomas J. Krutsick, Brian Thompson, Steve Wallace
  • Publication number: 20030032609
    Abstract: A method of inhibiting angiogenesis in a mammal by administering to the mammal a compound which inhibits binding of endothelial PAS domain protein-1 to cis-acting transcription regulatory sequence in the promoter region of a gene encoding an angiogenic factor.
    Type: Application
    Filed: April 12, 2002
    Publication date: February 13, 2003
    Inventors: Mu-En Lee, Koji Maemura, Chung-Ming Hsieh
  • Publication number: 20020169139
    Abstract: Aortic-preferentially-expressed gene-1 (APEG-1) and striated muscle preferentially expressed (SPEG) polypeptide, DNA sequences encoding and controlling the transcription of the APEG-1/SPEG encoding gene, methods of diagnosing vascular injury, methods of conferring smooth muscle-cell specific expression, and methods of inhibiting vascular smooth muscle cell proliferation by increasing the level of APEG-1 at the site of vascular injury.
    Type: Application
    Filed: June 3, 2002
    Publication date: November 14, 2002
    Inventors: Mu-En Lee, Chung-Ming Hsieh
  • Patent number: 6399753
    Abstract: Aortic-preferentially-expressed gene-1 (APEG-1) and striated muscle preferentially expressed (SPEG) polypeptide, DNA sequences encoding and controlling the transcription of the APEG-1/SPEG encoding gene, methods of diagnosing vascular injury, methods of conferring smooth muscle-cell specific expression, and methods of inhibiting vascular smooth muscle cell proliferation by increasing the level of APEG-1 at the site of vascular injury.
    Type: Grant
    Filed: August 14, 1998
    Date of Patent: June 4, 2002
    Assignee: President and Fellows of Harvard College
    Inventors: Mu-En Lee, Chung-Ming Hsieh
  • Patent number: 6395548
    Abstract: A method of inhibiting angiogenesis in a mammal by administering to the mammal a compound which inhibits binding of endothelial PAS domain protein-1 to cis-acting transcription regulatory sequence in the promoter region of a gene encoding an angiogenic factor.
    Type: Grant
    Filed: August 13, 1999
    Date of Patent: May 28, 2002
    Assignee: President and Fellows of Harvard College
    Inventors: Mu-En Lee, Koji Maemura, Chung-Ming Hsieh
  • Patent number: 6350592
    Abstract: Aortic-preferentially-expressed gene-1 (APEG-1) and striated muscle preferentially expressed (SPEG) polypeptide, DNA sequences encoding and controlling the transcription of the APEG-1/SPEG encoding gene, methods of diagnosing vascular injury, methods of conferring smooth muscle-cell specific expression, and methods of inhibiting vascular smooth muscle cell proliferation by increasing the level of APEG-1 at the site of vascular injury.
    Type: Grant
    Filed: April 30, 1999
    Date of Patent: February 26, 2002
    Assignee: President and Fellows of Harvard College
    Inventors: Mu-En Lee, Chung-Ming Hsieh
  • Patent number: 5846773
    Abstract: Aortic-preferentially-expressed gene-1 (APEG-1) and striated muscle preferentially expressed (SPEG) polypeptide, DNA sequences encoding and controlling the transcription of the APEG-1/SPEG encoding gene, methods of diagnosing vascular injury, methods of conferring smooth muscle-cell specific expression, and methods of inhibiting vascular smooth muscle cell proliferation by increasing the level of APEG-1 at the site of vascular injury.
    Type: Grant
    Filed: February 6, 1997
    Date of Patent: December 8, 1998
    Assignee: President and Fellows of Harvard College
    Inventors: Mu-En Lee, Chung-Ming Hsieh
  • Patent number: 5786171
    Abstract: An aortic-preferentially-expressed gene-1 (APEG-1) polypeptide, DNA sequences encoding and controlling the transcription of APEG-1, methods of diagnosing vascular injury, and methods of inhibiting vascular smooth muscle cell proliferation by increasing the level of APEG-1 at the site of vascular injury.
    Type: Grant
    Filed: June 22, 1995
    Date of Patent: July 28, 1998
    Assignee: President and Fellows of Harvard University
    Inventors: Mu-En Lee, Chung-Ming Hsieh