Patents by Inventor Chung-Ming Yu

Chung-Ming Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128324
    Abstract: A field effect transistor includes a substrate having a transistor forming region thereon; an insulating layer on the substrate; a first graphene layer on the insulating layer within the transistor forming region; an etch stop layer on the first graphene layer within the transistor forming region; a first inter-layer dielectric layer on the etch stop layer; a gate trench recessed into the first inter-layer dielectric layer and the etch stop layer within the transistor forming region; a second graphene layer on interior surface of the gate trench; a gate dielectric layer on the second graphene layer and on the first inter-layer dielectric layer; and a gate electrode on the gate dielectric layer within the gate trench.
    Type: Application
    Filed: November 21, 2022
    Publication date: April 18, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Kuo-Chih Lai, Shih-Min Chou, Nien-Ting Ho, Wei-Ming Hsiao, Li-Han Chen, Szu-Yao Yu, Chung-Yi Chiu
  • Patent number: 11953740
    Abstract: A package structure including a photonic, an electronic die, an encapsulant and a waveguide is provided. The photonic die includes an optical coupler. The electronic die is electrically coupled to the photonic die. The encapsulant laterally encapsulates the photonic die and the electronic die. The waveguide is disposed over the encapsulant and includes an upper surface facing away from the encapsulant. The waveguide includes a first end portion and a second end portion, the first end portion is optically coupled to the optical coupler, and the second end portion has a groove on the upper surface.
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Ming Weng, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Che-Hsiang Hsu
  • Patent number: 11947173
    Abstract: A package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler; an interconnect structure over the photonic layer; an electronic die and a first dielectric layer over the interconnect structure, where the electronic die is connected to the interconnect structure; a first substrate bonded to the electronic die and the first dielectric layer; a socket attached to a top surface of the first substrate; and a fiber holder coupled to the first substrate through the socket, where the fiber holder includes a prism that re-orients an optical path of an optical signal.
    Type: Grant
    Filed: May 5, 2023
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Ming Weng, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Che-Hsiang Hsu
  • Patent number: 11932534
    Abstract: A microelectromechanical system (MEMS) structure and method of forming the MEMS device, including forming a first metallization structure over a complementary metal-oxide-semiconductor (CMOS) wafer, where the first metallization structure includes a first sacrificial oxide layer and a first metal contact pad. A second metallization structure is formed over a MEMS wafer, where the second metallization structure includes a second sacrificial oxide layer and a second metal contact pad. The first metallization structure and second metallization structure are then bonded together. After the first metallization structure and second metallization structure are bonded together, patterning and etching the MEMS wafer to form a MEMS element over the second sacrificial oxide layer. After the MEMS element is formed, removing the first sacrificial oxide layer and second sacrificial oxide layer to allow the MEMS element to move freely about an axis.
    Type: Grant
    Filed: March 16, 2022
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Hua Lin, Chang-Ming Wu, Chung-Yi Yu, Ping-Yin Liu, Jung-Huei Peng
  • Publication number: 20240088285
    Abstract: Various embodiments of the present application are directed towards a group III-V device including a rough buffer layer. The rough buffer layer overlies a silicon substrate, a buffer structure overlies the rough buffer layer, and a heterojunction structure overlies the buffer structure. The buffer structure causes band bending and formation of a two-dimensional hole gas (2DHG) in the rough buffer layer. The rough buffer layer includes silicon or some other suitable semiconductor material and, in some embodiments, is doped. A top surface of the rough buffer layer and/or a bottom surface of the rough buffer layer is/are rough to promote carrier scattering along the top and bottom surfaces. The carrier scattering reduces carrier mobility and increases resistance at the 2DHG. The increased resistance increases an overall resistance of the silicon substrate, which reduces substrate loses and increases a power added efficiency (PAE).
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Inventors: Kuei-Ming Chen, Chi-Ming Chen, Chung-Yi Yu
  • Patent number: 11923237
    Abstract: A manufacturing method of a semiconductor device includes at least the following steps. A sacrificial substrate is provided. An epitaxial layer is formed on the sacrificial substrate. An etch stop layer is formed on the epitaxial layer. Carbon atoms are implanted into the etch stop layer. A capping layer and a device layer are formed on the etch stop layer. A handle substrate is bonded to the device layer. The sacrificial substrate, the epitaxial layer, and the etch stop layer having the carbon atoms are removed from the handle substrate.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Ming Chen, Kuei-Ming Chen, Po-Chun Liu, Chung-Yi Yu, Chia-Shiung Tsai
  • Publication number: 20240069277
    Abstract: A semiconductor package includes a first die stack structure and a second die stack structure, an insulating encapsulation, a redistribution structure, at least one prism structure and at least one reflector. The first die stack structure and the second die stack structure are laterally spaced apart from each other along a first direction, and each of the first die stack structure and the second die stack structure comprises an electronic die; and a photonic die electronically communicating with the electronic die. The insulating encapsulation laterally encapsulates the first die stack structure and the second die stack structure. The redistribution structure is disposed on the first die stack structure, the second die stack structure and the insulating encapsulation, and electrically connected to the first die stack structure and the second die stack structure. The at least one prism structure is disposed within the redistribution structure and optically coupled to the photonic die.
    Type: Application
    Filed: August 29, 2022
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Yi Kuo, Chen-Hua Yu, Cheng-Chieh Hsieh, Che-Hsiang Hsu, Chung-Ming Weng, Tsung-Yuan Yu
  • Publication number: 20230212554
    Abstract: Disclosed herein are methods for selecting an antibody fragment specific to an influenza virus. According to certain embodiments of the present disclosure, the influenza virus may be influenza virus type A (IAV) or influenza virus type B (IBV). Also disclosed herein are the selected antibodies, recombinant antibody produced from the selected antibodies, and the uses thereof in the diagnosis of influenza virus infection.
    Type: Application
    Filed: June 7, 2021
    Publication date: July 6, 2023
    Applicant: Academia Sinica
    Inventors: An-Suei YANG, Chung-Ming YU, Ing-Chien CHEN, Chao-Ping TUNG, Hung-Pin PENG
  • Publication number: 20230168249
    Abstract: Disclosed herein are recombinant antibodies or the fragment thereof for detecting severe acute respiratory syndrome coronavirus (SARS-CoV). According to some embodiments, the SARS-CoV is SARS-CoV-1. According to some alternative embodiments, the SARS-CoV is SARS-CoV-2. Also disclosed herein are a kit comprising the recombinant antibodies, and a method for diagnosing the infection of SARS-CoV by using the recombinant antibody or the kit.
    Type: Application
    Filed: May 4, 2021
    Publication date: June 1, 2023
    Applicant: Academia Sinica
    Inventors: An-Suei YANG, Chao-Ping TUNG, Chung-Ming YU, Chi-Yung CHEN, Yu-Chuan HUANG, Pei-Hsun TSAI, Szu-Yu LIN, Hung-Ju HSU, Hung-Pin PENG, Fei-Hung HUNG
  • Patent number: 11434277
    Abstract: Disclosed herein are methods for high-throughput screening of a virus-specific neutralizing antibody. According to certain embodiments of the present disclosure, the virus is an influenza virus. Also disclosed herein are the antibodies selected by the high-throughput screening method, and the uses thereof in the prophylaxis and/or treatment of viral infection.
    Type: Grant
    Filed: October 19, 2018
    Date of Patent: September 6, 2022
    Assignee: ACADEMIA SINICA
    Inventors: An-Suei Yang, Ing-Chien Chen, Yi-Kai Chiu, Chung-Ming Yu, Cheng-Chung Lee, Chao-Ping Tung, Yueh-Liang Tsou, Yi-Jen Huang, Chia-Lung Lin, Hong-Sen Chen, Hwei-Jiung Wang
  • Publication number: 20220213188
    Abstract: Provided herein is a method for treating neurodegenerative diseases, such as Alzheimer's disease (AD), by use of monoclonal antibody, which exhibits a binding affinity to Siglec-3 receptor. According to some embodiments of the present disclosure, the monoclonal antibody is capable of enhancing phagocytosis of neurotoxic peptides by immune cells thereby providing a neuroprotective effect to a subject in need thereof.
    Type: Application
    Filed: September 25, 2019
    Publication date: July 7, 2022
    Applicant: Academia Sinica
    Inventors: Shie-Liang HSIEH, Pei-Shan SUNG, Ming-Ting HUANG, An-Suei YANG, Chung-Ming YU
  • Patent number: 11311922
    Abstract: A wire drawing process of a light storage wire includes a feeding step, a mixing step, a first drying step, a hot melt extrusion step, a first cooling step, a shaping/organizing wire step, a hot-temperature remodeling step, a stretching step, a second cooling step, a strand winding/rolling step, and a second drying step.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: April 26, 2022
    Assignee: WINN APPLIED MATERIAL INC.
    Inventors: Chung-Ming Yu, Shi-Wei Wang, Shih-Hao Wang
  • Patent number: 11313051
    Abstract: A method for manufacturing a composite fabric includes the steps of feeding, mixing and stirring, first drying, hot melt extrusion, first cooling, stretch extension, second cooling, winding-strands-into-roll, second drying, and weaving. The composite fabric is composed of multiple first threads and multiple second threads which are woven to the first threads. The first threads and the second threads are respectively reflective threads and glowing threads so that the composite fabric includes both features of light reflection and glowing in dark.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: April 26, 2022
    Assignee: WINN APPLIED MATERIAL INC.
    Inventors: Chung-Ming Yu, Shi-Wei Wang, Shih-Hao Wang
  • Patent number: 11292171
    Abstract: The thread drawing processes include the steps of feeding, mixing and stirring, first drying, hot melt extrusion, first cooling, stretch extension, second cooling, winding-strands-into-roll, and second drying. The threads made by the processes mainly use thermoplastic polyurethane particles which are easily prepared. When fabric made by the threads is attached to objects, the fabric is flat and neat.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: April 5, 2022
    Assignee: WINN APPLIED MATERIAL INC.
    Inventors: Chung-Ming Yu, Shi-Wei Wang, Shih-Hao Wang
  • Patent number: 11242621
    Abstract: The adhesive thread drawing processes include the steps of feeding, mixing and stirring, first drying, hot melt extrusion, first cooling, stretch extension, second cooling, winding-strands-into-roll, and second drying. The threads made by the processes are woven into fabric which has a certain level of stickiness so as to be attached onto objects without using glue and adhesive, and the fabric is flat and neat when it is attached to an object.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: February 8, 2022
    Assignee: WINN APPLIED MATERIAL INC.
    Inventors: Chung-Ming Yu, Shi-Wei Wang, Shih-Hao Wang
  • Publication number: 20210292413
    Abstract: Disclosed herein is a novel monoclonal antibody exhibiting binding affinity to Siglec-3 receptor. According to the embodiment, the monoclonal antibody is capable of reversing HBV-induced immunosuppression. Accordingly, also disclosed herein are the uses thereof in the treatment and/or prophylaxis of hepatitis B virus (HBV) infection.
    Type: Application
    Filed: September 25, 2018
    Publication date: September 23, 2021
    Applicant: Academia Sinica
    Inventors: Shie-Liang HSIEH, Tsung-Yu TSAI, An-Suei YANG, Chung-Ming YU, Cheng-Yuan PENG
  • Publication number: 20210252573
    Abstract: A wire drawing process of a light storage wire includes a feeding step, a mixing step, a first drying step, a hot melt extrusion step, a first cooling step, a shaping/organizing wire step, a hot-temperature remodeling step, a stretching step, a second cooling step, a strand winding/rolling step, and a second drying step.
    Type: Application
    Filed: February 18, 2020
    Publication date: August 19, 2021
    Inventors: CHUNG-MING YU, SHI-WEI WANG, SHIH-HAO WANG
  • Publication number: 20210070843
    Abstract: Disclosed herein are methods for high-throughput screening of a virus-specific neutralizing antibody. According to certain embodiments of the present disclosure, the virus is an influenza virus. Also disclosed herein are the antibodies selected by the high-throughput screening method, and the uses thereof in the prophylaxis and/or treatment of viral infection.
    Type: Application
    Filed: October 19, 2018
    Publication date: March 11, 2021
    Inventors: An-Suei YANG, Ing-Chien CHEN, Yi-Kai CHIU, Chung-Ming YU, Cheng-Chung LEE, Chao-Ping TUNG, Yueh-Liang TSOU, Yi-Jen HUANG, Chia-Lung LIN, Hong-Sen CHEN, Hwei-Jiung WANG
  • Publication number: 20210060843
    Abstract: The thread drawing processes include the steps of feeding, mixing and stirring, first drying, hot melt extrusion, first cooling, stretch extension, second cooling, winding-strands-into-roll, and second drying. The threads made by the processes mainly use thermoplastic polyurethane particles which are easily prepared. When fabric made by the threads is attached to objects, the fabric is flat and neat.
    Type: Application
    Filed: September 4, 2019
    Publication date: March 4, 2021
    Inventors: CHUNG-MING YU, SHI-WEI WANG, SHIH-HAO WANG
  • Patent number: 10752673
    Abstract: Disclosed herein are methods for high-throughput screening of a functional antibody fragment for an immunoconjugate that targets a protein antigen. The method combines a phage-displayed synthetic antibody library and high-throughput cytotoxicity screening of non-covalently assembled immunotoxins or cytotoxic drug to identify highly functional synthetic antibody fragments for delivering toxin payloads.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: August 25, 2020
    Assignee: ACADEMIA SINICA
    Inventors: An-Suei Yang, Hong-Sen Chen, Chung-Ming Yu, Shin-Chen Hou, Wei-Ying Kuo, Yi-Kai Chiu, Yueh-Liang Tsou, Hung-Ju Hsu, Hwei-Jiung Wang, Shih-Hsien Chuang, Chao-Pin Lee