Patents by Inventor Chung-Nan Lin

Chung-Nan Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11935833
    Abstract: A method of forming an IC structure includes forming first and second power rails at a power rail level. First metal segments are formed at a first metal level above the power rail level. Each first metal segment of the plurality of first metal segments overlap one or both of the first power rail or the second power rail. First vias are formed between the power rail level and the first metal level. Second metal segments are formed at a second metal level above the first metal level. At least one second metal segment of the plurality of second metal segments overlaps the first power rail. At least one second metal segment of the plurality of second metal segments overlaps the second power rail. A plurality of second vias are formed between the first metal level and the second metal level.
    Type: Grant
    Filed: December 8, 2021
    Date of Patent: March 19, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hiranmay Biswas, Chi-Yeh Yu, Kuo-Nan Yang, Chung-Hsing Wang, Stefan Rusu, Chin-Shen Lin
  • Patent number: 11929331
    Abstract: The present disclosure provides a routing structure. The routing structure includes a substrate having a boundary and a first conductive trace configured to be coupled to a first conductive pad disposed within the boundary of the substrate. The first conductive trace is inclined with respect to the boundary of the substrate.
    Type: Grant
    Filed: December 19, 2022
    Date of Patent: March 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chin-Shen Lin, Wan-Yu Lo, Meng-Xiang Lee, Hao-Tien Kan, Kuo-Nan Yang, Chung-Hsing Wang
  • Publication number: 20240071535
    Abstract: Provided is an anti-fuse memory including a anti-fuse memory cell including an isolation structure, a select gate, first and second gate insulating layers, an anti-fuse gate, and first, second and third doped regions. The isolation structure is disposed in a substrate. The select gate is disposed on the substrate. The first gate insulating layer is disposed between the select gate and the substrate. The anti-fuse gate is disposed on the substrate and partially overlapped with the isolation structure. The second gate insulating layer is disposed between the anti-fuse gate and the substrate. The first doped region and the second doped region are disposed in the substrate at opposite sides of the select gate, respectively, wherein the first doped region is located between the select gate and the anti-fuse gate. The third doped region is disposed in the substrate and located between the first doped region and the isolation structure.
    Type: Application
    Filed: October 16, 2022
    Publication date: February 29, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Chung-Hao Chen, Chi-Hsiu Hsu, Chi-Fa Lien, Ying-Ting Lin, Cheng-Hsiao Lai, Ya-Nan Mou
  • Patent number: 10690161
    Abstract: A riveting structure and a riveting method are provided. The riveting structure includes a first metal element and a second metal element. The first metal element includes a first upper surface, a pressure-receiving portion and a recess portion. The recess portion is recessed from the first upper surface. The pressure-receiving portion is protruded from a surface of the recess portion. The second metal element includes a second lower surface and a protrusion portion and has a through hole. The protrusion portion is protruded from the second lower surface and correspondingly disposed in the recess portion. The through hole penetrates the second metal element via a central part of the protrusion portion. The pressure-receiving portion is correspondingly received in the through hole and is adapted to be pressed and deformed to be riveted to the through hole.
    Type: Grant
    Filed: July 18, 2018
    Date of Patent: June 23, 2020
    Assignees: LITE-ON ELECTRONICS (GUANGZHOU) LIMITED, LITE-ON TECHNOLOGY CORPORATION
    Inventors: Yung-Lung Liu, Chung-Nan Lin
  • Publication number: 20190316615
    Abstract: A riveting structure and a riveting method are provided. The riveting structure includes a first metal element and a second metal element. The first metal element includes a first upper surface, a pressure-receiving portion and a recess portion. The recess portion is recessed from the first upper surface. The pressure-receiving portion is protruded from a surface of the recess portion. The second metal element includes a second lower surface and a protrusion portion and has a through hole. The protrusion portion is protruded from the second lower surface and correspondingly disposed in the recess portion. The through hole penetrates the second metal element via a central part of the protrusion portion. The pressure-receiving portion is correspondingly received in the through hole and is adapted to be pressed and deformed to be riveted to the through hole.
    Type: Application
    Filed: July 18, 2018
    Publication date: October 17, 2019
    Inventors: Yung-Lung LIU, Chung-Nan LIN
  • Patent number: 10437294
    Abstract: A holding structure adapted to position a storage device is provided. The holding structure includes an integrally formed metal bracket. The integrally formed metal bracket includes a plurality of first segments and a second segment. The first segments are sequentially connected to each other and define an accommodating space, wherein any two adjacent first segments are bent relatively to each other, and the storage device is adapted to be positioned in the accommodating space. A first end of the second segment is connected to one of the first segments, and a second end of the second segment is detachably assembled to another one of the first segments to confine the storage device in the accommodating space. Moreover, a mounting structure including the holding structure is also mentioned.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: October 8, 2019
    Assignees: LITE-ON ELECTRONICS (GUANGZHOU) LIMITED, Lite-On Technology Corporation
    Inventors: Chung-Nan Lin, Liang-Cheng Chiu
  • Publication number: 20190041921
    Abstract: A device casing including a bottom plate, a first side plate, a second side plate opposite to the first side plate, a third side plate and two pivoting elements is provided. The bottom plate is connected to the first side plate and the second side plate respectively to form a U-shaped frame having an opening end opposite to the bottom plate. The third side plate is pivotally connected to the first side plate and the second side plate respectively. The two pivoting elements are configured to fix but rotatably connect the third side plate to the first side plate and the second side plate respectively. The two pivoting elements are adjacent to the opening end. The third side plate whose axis of rotation is an imaginary line connecting the two pivoting elements is optionally movable between a closed position and an opened position.
    Type: Application
    Filed: January 8, 2018
    Publication date: February 7, 2019
    Inventors: Chung-Nan LIN, Guan-Hua FU
  • Publication number: 20180232018
    Abstract: A holding structure adapted to position a storage device is provided. The holding structure includes an integrally formed metal bracket. The integrally formed metal bracket includes a plurality of first segments and a second segment. The first segments are sequentially connected to each other and define an accommodating space, wherein any two adjacent first segments are bent relatively to each other, and the storage device is adapted to be positioned in the accommodating space. A first end of the second segment is connected to one of the first segments, and a second end of the second segment is detachably assembled to another one of the first segments to confine the storage device in the accommodating space. Moreover, a mounting structure including the holding structure is also mentioned.
    Type: Application
    Filed: January 12, 2018
    Publication date: August 16, 2018
    Applicants: LITE-ON ELECTRONICS (GUANGZHOU) LIMITED, Lite-On Technology Corporation
    Inventors: Chung-Nan Lin, Liang-Cheng Chiu