Abstract: The present invention relates to a resistive random-access memory, including: a bottom electrode; a resistive switch layer disposed on the bottom electrode, including a first switch layer, a second switch layer, and a filament path control layer, wherein the first switch layer is interposed between the bottom electrode and the filament path control layer, and the filament path control layer is interposed between the first switch layer and the second switch layer; and a top electrode disposed on the second switch layer, wherein the filament path control layer includes one or more micro-pores. The present invention also relates to a memory array which includes a substrate and a plurality of the above-mentioned resistive random access memories, wherein the resistive random access memories are disposed on the substrate.