Patents by Inventor Chung-Pei Chao

Chung-Pei Chao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7904195
    Abstract: A method for prognostic maintenance in semiconductor manufacturing equipments is disclosed. The said method comprising: collecting a plurality of raw data from the default detection and classification system for equipments, preprocessing the raw data, using the neural network model (NN model) to find a plurality of health indices, generating health information by using the principal component analysis (PCA) to identify the health indices, and using the partial least square discriminated analysis (PLS-DA) to find a health report. The health report provides the engineers with current risk levels of equipments. By the health report, the engineers can initiate prognostic maintenance and repair the equipments early.
    Type: Grant
    Filed: October 1, 2008
    Date of Patent: March 8, 2011
    Assignee: Inotera Memories, Inc.
    Inventors: Chung-Pei Chao, Chin-Long Chen
  • Publication number: 20100228382
    Abstract: An in-line wafer measurement data compensation method is presented, and the steps of the method includes: acquire a pre-wafer measurement data, a current wafer measurement data, and a current offset; establish an auto regressive integrated moving average (ARIMA) model and an exponential weighted integrated moving average (EWIMA) model, and input the pre-wafer measurement data, the current wafer measurement data, and the current offset to the ARIMA model and the EWIMA model; then get outputs of the ARIMA model and EWIMA model, wherein the outputs are wafer estimation data. Thereby, the semiconductor manufacturer could reduce the sampling time of an in-line measurement and still maintain an acceptable production performance and maintain control process stability.
    Type: Application
    Filed: June 2, 2009
    Publication date: September 9, 2010
    Applicant: INOTERA MEMORIES, INC.
    Inventor: CHUNG-PEI CHAO
  • Publication number: 20090306804
    Abstract: A method for prognostic maintenance in semiconductor manufacturing equipments is disclosed. The said method comprising: collecting a plurality of raw data from the default detection and classification system for equipments, preprocessing the raw data, using the neural network model (NN model) to find a plurality of health indices, generating health information by using the principal component analysis (PCA) to identify the health indices, and using the partial least square discriminated analysis (PLS-DA) to find a health report. The health report provides the engineers with current risk levels of equipments. By the health report, the engineers can initiate prognostic maintenance and repair the equipments early.
    Type: Application
    Filed: October 1, 2008
    Publication date: December 10, 2009
    Applicant: INOTERA MEMORIES, INC.
    Inventors: CHUNG-PEI CHAO, CHIN-LONG CHEN
  • Publication number: 20030001243
    Abstract: A method for monitoring the uniformity or quality of ultra-thin silicon nitride film uses wet re-oxidation of thin nitride to monitor its thickness variation to evaluate its quality. For nitride films with similar thicknesses, thinner oxide implies superior quality of the original nitride film and vice versa. The method of the present invention extends the use of ellipsometer measurement tools to the sub 10 Å level.
    Type: Application
    Filed: June 19, 2001
    Publication date: January 2, 2003
    Inventors: Yung-Hsien Wu, Chung Pei Chao, Chia-Lin Ku
  • Patent number: 6291030
    Abstract: A method for forming a metal interconnect having a plurality of metal lines and an interlayer dielectric is disclosed. The metal interconnect has a decreased capacitance between the metal lines of the metal interconnect. First, a metal interconnect is formed onto a substrate. A first HDPCVD oxide layer is formed over the metal interconnect. A second HDPCVD oxide layer is formed over the first HDPCVD oxide layer, the second HDPCVD oxide layer being formed such that air gaps are formed between the metal lines of the metal interconnect. Furthermore, a third HDPCVD oxide layer may be formed over the second HDPCVD oxide layer, the third HDPCVD oxide formed using a sputter to deposition ratio higher than that used to form the second HDPCVD oxide layer.
    Type: Grant
    Filed: December 21, 1999
    Date of Patent: September 18, 2001
    Assignee: ProMOS Technologies, Inc.
    Inventors: Chung-Pei Chao, Cheng-Che Lee