Patents by Inventor Chung-Sheng Hsiung

Chung-Sheng Hsiung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8129762
    Abstract: A method is provided for processing a substrate. The substrate has at least one filter region, a plurality of bond pads, and a plurality of scribe lines arranged around the filter region and bond pads. A first planarization layer is formed above the substrate. The planarization layer has a substantially flat top surface overlying the filter region, the bond pads and the scribe lines. At least one color resist layer is formed over the first planarization layer and within the filter region while the first planarization layer covers the bond pads and the scribe lines.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: March 6, 2012
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fu-Tien Weng, Yu-Kung Hsiao, Hung-Jen Hsu, Yi-Ming Dai, Chin Chen Kuo, Te-Fu Tseng, Chih-Kung Chang, Jack Deng, Chung-Sheng Hsiung, Bii-Junq Chang
  • Publication number: 20090104547
    Abstract: A method is provided for processing a substrate. The substrate has at least one filter region, a plurality of bond pads, and a plurality of scribe lines arranged around the filter region and bond pads. A first planarization layer is formed above the substrate. The planarization layer has a substantially flat top surface overlying the filter region, the bond pads and the scribe lines. At least one color resist layer is formed over the first planarization layer and within the filter region while the first planarization layer covers the bond pads and the scribe lines.
    Type: Application
    Filed: December 31, 2008
    Publication date: April 23, 2009
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fu-Tien Weng, Yu-Kung Hsiao, Hung-Jen Hsu, Yi-Ming Dai, Chin Chen Kuo, Te-Fu Tseng, Chih-Kung Chang, Jack Deng, Chung-Sheng Hsiung, Bii-Junq Chang
  • Patent number: 7507598
    Abstract: A method is provided for processing a substrate. The substrate has at least one filter region, a plurality of bond pads, and a plurality of scribe lines arranged around the filter region and bond pads. A first planarization layer is formed above the substrate. The planarization layer has a substantially flat top surface overlying the filter region, the bond pads and the scribe lines. At least one color resist layer is formed over the first planarization layer and within the filter region while the first planarization layer covers the bond pads and the scribe lines.
    Type: Grant
    Filed: June 20, 2005
    Date of Patent: March 24, 2009
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fu-Tien Weng, Yu-Kung Hsiao, Hung-Jen Hsu, Yi-Ming Dai, Chin Chen Kuo, Te-Fu Tseng, Chih-Kung Chang, Jack Deng, Chung-Sheng Hsiung, Bii-Junq Chang
  • Patent number: 7126099
    Abstract: An image sensor improving the uniformity of effective incident light. In one example, the size of microlenses disposed in different regions of the image sensor is changed to balance the brightness in different regions, in which the size of each microlens is a function of the distance between the microlens to the chip center In another example, the distance between the center of the microlens and the center of the corresponding sensing area is changed to balance the brightness in different regions and the corresponding color filters are shifted such that the microlens is overlying a corresponding color filter unit without overlying adjacent regions thereof, in which the distance between the center of the microlens and the center of the corresponding sensing area is a function of the distance between the corresponding sensing area to the chip center.
    Type: Grant
    Filed: August 26, 2003
    Date of Patent: October 24, 2006
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hung-Jen Hsu, Chiu-Kung Chang, Chung-Sheng Hsiung, Fu-Tien Wong
  • Publication number: 20060019424
    Abstract: A method is provided for processing a substrate. The substrate has at least one filter region, a plurality of bond pads, and a plurality of scribe lines arranged around the filter region and bond pads. A first planarization layer is formed above the substrate. The planarization layer has a substantially flat top surface overlying the filter region, the bond pads and the scribe lines. At least one color resist layer is formed over the first planarization layer and within the filter region while the first planarization layer covers the bond pads and the scribe lines.
    Type: Application
    Filed: June 20, 2005
    Publication date: January 26, 2006
    Inventors: Fu-Tien Weng, Yu-Kung Hsiao, Hung-Jen Hsu, Yi-Ming Dai, Chin Chen Kuo, Te-Fu Tseng, Chih-Kung Chang, Jack Deng, Chung-Sheng Hsiung, Bii-Junq Chang
  • Publication number: 20050045803
    Abstract: An image sensor improving the uniformity of effective incident light. In one example, the size of microlenses disposed in different regions of the image sensor is changed to balance the brightness in different regions, in which the size of each microlens is a function of the distance between the microlens to the chip center In another example, the distance between the center of the microlens and the center of the corresponding sensing area is changed to balance the brightness in different regions and the corresponding color filters are shifted such that the microlens is overlying a corresponding color filter unit without overlying adjacent regions thereof, in which the distance between the center of the microlens and the center of the corresponding sensing area is a function of the distance between the corresponding sensing area to the chip center.
    Type: Application
    Filed: August 26, 2003
    Publication date: March 3, 2005
    Inventors: Hung-Jen Hsu, Chiu-Kung Chang, Chung-Sheng Hsiung, Fu-Tien Wong
  • Patent number: 6849533
    Abstract: A method for fabricating a microelectronic product provides for forming a planarizing layer upon a bond pad and a topographic feature, both formed laterally separated over a substrate. The planarizing layer is formed with a diminished thickness upon the bond pad such that it may be readily etched to expose the bond pad while employing as a mask an additional layer formed over the topographic feature but not over the bond pad. The method is particularly useful for forming color filter sensor image array optoelectronic products with attenuated bond pad corrosion.
    Type: Grant
    Filed: January 29, 2003
    Date of Patent: February 1, 2005
    Assignee: Taiwan Semiconductor Manufacturing Co., LTD
    Inventors: Chih-Kung Chang, Yu-Kung Hsiao, Sheng-Liang Pan, Fu-Tien Wong, Chin-Chen Kuo, Chung-Sheng Hsiung, Hung-Jen Hsu, Yi-Ming Dai, Po-Wen Lin, Te-Fu Tseng
  • Publication number: 20040147105
    Abstract: A method for fabricating a microelectronic product provides for forming a planarizing layer upon a bond pad and a topographic feature, both formed laterally separated over a substrate. The planarizing layer is formed with a diminished thickness upon the bond pad such that it may be readily etched to expose the bond pad while employing as a mask an additional layer formed over the topographic feature but not over the bond pad. The method is particularly useful for forming color filter sensor image array optoelectronic products with attenuated bond pad corrosion.
    Type: Application
    Filed: January 29, 2003
    Publication date: July 29, 2004
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Kung Chang, Yu-Kung Hsiao, Sheng-Liang Pan, Fu-Tien Wong, Chin-Chen Kuo, Chung-Sheng Hsiung, Hung-Jen Hsu, Yi-Ming Dai, Po-Wen Lin, Te-Fu Tseng
  • Patent number: 6660641
    Abstract: Within a method for forming a planarizing layer within a microelectronic fabrication, there is employed formed upon a partially photoexposed planarizing layer formed of a partially photoexposed negative photoresist material a sacrificial layer. Within the method, when sequentially: (1) stripping from the partially photoexposed planarizing layer the sacrificial layer; and (2) developing the partially photoexposed planarizing layer to form a developed planarizing layer, the developed planarizing layer is formed with enhanced planarity and diminished thickness.
    Type: Grant
    Filed: July 5, 2002
    Date of Patent: December 9, 2003
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin Chen Kuo, Sheng Liang Pan, Yu-Kung Hsiao, Chih-Kung Chang, Fu-Tien Wong, Chung Sheng Hsiung
  • Patent number: 6590239
    Abstract: Within a method for forming a color filter image array optoelectronic microelectronic fabrication, and the color filter image array optoelectronic microelectronic fabrication formed employing the method, there is provided a substrate having formed therein a series of photo active regions. There is also formed over the substrate at least one color filter layer having formed therein a color filter region having a concave upper surface. There is also formed upon the at least one color filter layer and planarizing the at least one color filter region having the concave upper surface, a planarizing layer. The planarizing layer provides for enhanced resolution of the color filter image array optoelectronic microelectronic fabrication.
    Type: Grant
    Filed: July 30, 2001
    Date of Patent: July 8, 2003
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Sheng Hsiung, Kuo-Liang Lu, Yu-Kung Hsiao, Chih-Kung Chang, Fu-Tien Wong, Sung-Yung Yang, Chin-Chen Kuo
  • Publication number: 20030020083
    Abstract: Within a method for forming a color filter image array optoelectronic microelectronic fabrication, and the color filter image array optoelectronic microelectronic fabrication formed employing the method, there is provided a substrate having formed therein a series of photo active regions. There is also formed over the substrate at least one color filter layer having formed therein a color filter region having a concave upper surface. There is also formed upon the at least one color filter layer and planarizing the at least one color filter region having the concave upper surface, a planarizing layer. The planarizing layer provides for enhanced resolution of the color filter image array optoelectronic microelectronic fabrication.
    Type: Application
    Filed: July 30, 2001
    Publication date: January 30, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Sheng Hsiung, Kuo-Liang Lu, Yu-Kung Hsiao, Chih-Kung Chang, Fu-Tien Wong, Sung-Yung Yang, Chin-Chen Kuo
  • Publication number: 20020063214
    Abstract: Within both a method for fabricating an optoelectronic microelectronic fabrication and the optoelectronic microelectronic fabrication fabricated in accord with the method for fabricating the optoelectronic microelectronic fabrication there is first provided a substrate having formed therein a minimum of one photoactive region which is sensitive to infrared radiation. There is also formed over the substrate and in registration with the minimum of one optically active region a minimum of one microlens layer. Similarly, there is also formed interposed between the substrate and the minimum of one microlens layer an infrared filter layer, wherein the infrared filter is not formed contacting the substrate. The method provides that the optoelectronic microelectronic fabrication is fabricated with enhanced optical sensitivity.
    Type: Application
    Filed: November 29, 2000
    Publication date: May 30, 2002
    Applicant: Taiwan Semiconductor Manufacturing Co. Ltd.
    Inventors: Yu-Kung Hsiao, Chih-Kung Chang, Fu-Tien Weng, Chung-Sheng Hsiung, Bii-Jung Chang, Kuo-Liang Lu