Abstract: A method for making iridium oxide nanoparticles includes dissolving an iridium salt to obtain a salt-containing solution, mixing a complexing agent with the salt-containing solution to obtain a blend solution, and adding an oxidating agent to the blend solution to obtain a product mixture. A molar ratio of a complexing compound of the complexing agent to the iridium salt is controlled in a predetermined range so as to permit the product mixture to include iridium oxide nanoparticles.

Abstract: A field effect transistor includes a substrate having a transistor forming region thereon; an insulating layer on the substrate; a first graphene layer on the insulating layer within the transistor forming region; an etch stop layer on the first graphene layer within the transistor forming region; a first inter-layer dielectric layer on the etch stop layer; a gate trench recessed into the first inter-layer dielectric layer and the etch stop layer within the transistor forming region; a second graphene layer on interior surface of the gate trench; a gate dielectric layer on the second graphene layer and on the first inter-layer dielectric layer; and a gate electrode on the gate dielectric layer within the gate trench.

Abstract: Packaged memory devices including memory devices hybrid bonded to logic devices and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a first memory die including a first memory cell electrically coupled to a first word line; a second memory cell electrically coupled to the first word line; and a first interconnect structure electrically coupled to the first word line; a circuitry die including a second interconnect structure, a first conductive feature of the first interconnect structure being bonded to a second conductive feature of the second interconnect structure through metal-to-metal bonds; and a word line driver electrically coupled to the first word line between the first memory cell and the second memory cell, the word line driver being electrically coupled to the first word line through the first interconnect structure and the second interconnect structure.

Abstract: A semiconductor device includes a substrate, a stack of semiconductor nanosheets, a dielectric wall, and a gate structure. The substrate includes a nanosheet mesa, and the stack of semiconductor nanosheets is disposed on the nanosheet mesa. The dielectric wall crosses through the nanosheet mesa and the stack of semiconductor nanosheets. The gate structure wraps the stack of semiconductor nanosheets and crosses over the dielectric wall, wherein a top of the dielectric wall has a recess.

Abstract: A method of forming a semiconductor device is provided. A transistor is formed at a first side of the substrate and a first dielectric layer is formed aside the transistor. A first metal via is formed through the first dielectric layer and aside the transistor. A first interconnect structure is formed over the first side of the substrate and electrically connected to the transistor and the first metal via. The substrate is thinned from a second side of the substrate. A capacitor is formed at the second side of the substrate and a second dielectric layer is formed aside the capacitor. A second metal via is formed through the second dielectric layer and the substrate and electrically connected to the first metal via.

Abstract: Provided is an anti-fuse memory including a anti-fuse memory cell including an isolation structure, a select gate, first and second gate insulating layers, an anti-fuse gate, and first, second and third doped regions. The isolation structure is disposed in a substrate. The select gate is disposed on the substrate. The first gate insulating layer is disposed between the select gate and the substrate. The anti-fuse gate is disposed on the substrate and partially overlapped with the isolation structure. The second gate insulating layer is disposed between the anti-fuse gate and the substrate. The first doped region and the second doped region are disposed in the substrate at opposite sides of the select gate, respectively, wherein the first doped region is located between the select gate and the anti-fuse gate. The third doped region is disposed in the substrate and located between the first doped region and the isolation structure.

Abstract: A backlight module including a substrate, a light source, a porous optical film, and a wavelength conversion optical layer is provided. The light source is located on the substrate. The porous optical film is disposed over the light source and has a plurality of emission structures, and the porous optical film distributes light generated by the light source to be emitted through the emission structures located at different positions of the porous optical film. The porous optical film has a central region and a peripheral region surrounding the central region, the central region is disposed corresponding to the light source, and an area of the central portion is A. The wavelength conversion optical layer is located between the light source and the porous optical film, and a vertical projection area of the wavelength conversion optical film is B, where 0.49?A/B?5.

Abstract: A backlight module including a carrier plate, a plurality of light sources, at least one low reflective portion, and a modulation film is provided. The carrier plate has a carrier surface carrying the light sources while the low reflective portion is disposed on the carrier surface between an outer light source and a side edge of the carrier plate. The reflectance of the low reflective portion is less than that of the carrier surface. The modulation film is disposed above the light sources while the low reflective portion has a projection area on the modulation film. The projection area has a lower normalized transmission ratio comparing to adjacent areas along an extending direction of the side edge of the carrier plate.

Abstract: A backlight module including a substrate, a light source, a porous optical film, and a wavelength conversion optical layer is provided. The light source is located on the substrate. The porous optical film is disposed over the light source and has a plurality of emission structures, and the porous optical film distributes light generated by the light source to be emitted through the emission structures located at different positions of the porous optical film. The porous optical film has a central region and a peripheral region surrounding the central region, the central region is disposed corresponding to the light source, and an area of the central portion is A. The wavelength conversion optical layer is located between the light source and the porous optical film, and a vertical projection area of the wavelength conversion optical film is B, where 0.49?A/B?5.

Abstract: The present invention provides a backlight module, comprising a light source module and an optical control layer disposed on the light source module. The optical control layer comprises a first optical film and a second optical film. The first optical film has a first overlap area on a first side, the first overlap area comprises first inner openings; the second optical film comprises a second overlap area near the first overlap area. The second overlap area matches the first overlap area. The second overlap area comprises second outer openings corresponding to the first inner openings.

Abstract: The present invention provides a backlight module, comprising a light source module and an optical control layer disposed on the light source module. The optical control layer comprises a first optical film and a second optical film. The first optical film has a first overlap area on a first side, the first overlap area comprises first inner openings; the second optical film comprises a second overlap area near the first overlap area. The second overlap area matches the first overlap area. The second overlap area comprises second outer openings corresponding to the first inner openings.

Abstract: A backlight module including a carrier plate, a plurality of light sources, at least one low reflective portion, and a modulation film is provided. The carrier plate has a carrier surface carrying the light sources while the low reflective portion is disposed on the carrier surface between an outer light source and a side edge of the carrier plate. The reflectance of the low reflective portion is less than that of the carrier surface. The modulation film is disposed above the light sources while the low reflective portion has a projection area on the modulation film. The projection area has a lower normalized transmission ratio comparing to adjacent areas along an extending direction of the side edge of the carrier plate.

Abstract: A liquid crystal display device includes a white light emitting diode backlight module for supplying white light, a plurality of red sub-pixels, a plurality of green sub-pixels and a plurality of blue sub-pixels. Each of the blue sub-pixels includes a blue color filter, and each of the blue color filters has a blue light wavelength-transmittance relationship curve. A ratio of a maximum transmittance of the blue light wavelength-transmittance relationship curve to a full width at half maximum value of the maximum transmittance is greater than or equal to 0.0075.

Abstract: A high color expression display device and a method for manufacturing the same are provided. The display device includes a backlight module and a display panel for receiving light from the backlight module. The display panel has a color filter layer which consists of a plurality of color resists above the backlight module. Lights from the backlight module pass through the color resists and out of the display panel to form an output light. A NTSC saturation of the output light may be greater or smaller than 60%, and a CIE standard illuminant C test result of the color resists may correspondingly fall into different predetermined scopes to prevent color shift and maintain brightness of the display device.

Abstract: A high color expression display device and a method for manufacturing the same are provided. The display device includes a backlight module and a display panel for receiving light from the backlight module. The display panel has a color filter layer which consists of a plurality of color resists above the backlight module. Lights from the backlight module pass through the color resists and out of the display panel to form an output light. A NTSC saturation of the output light may be greater or smaller than 60%, and a CIE standard illuminant C test result of the color resists may correspondingly fall into different predetermined scopes to prevent color shift and maintain brightness of the display device.

Abstract: A method for fining water molecules mainly comprises the steps of driving the water to flow through a reverse osmosis device for filtering impurities; feeding the water to a heating device; feeding boiling water into a plurality of first mineral stone collision devices so as to form fine water molecules; cooling the fine water molecules; driving the cooling fine water molecules through a plurality of second mineral stone collision devices to fix the shape of the fine water molecules; driving the shape fine water molecules to flow through maifan stones; feeding the fine water molecules into a supersonic oscillating device and sterilizing germs in the water molecules by for example ultraviolet rays. An apparatus for forming fine water molecules is further comprised.